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/optee_os/lib/libutils/isoc/arch/riscv/
H A Dsetjmp_rv.S10 STR s0, REGOFF(0)(a0)
11 STR s1, REGOFF(1)(a0)
12 STR s2, REGOFF(2)(a0)
13 STR s3, REGOFF(3)(a0)
14 STR s4, REGOFF(4)(a0)
15 STR s5, REGOFF(5)(a0)
16 STR s6, REGOFF(6)(a0)
17 STR s7, REGOFF(7)(a0)
18 STR s8, REGOFF(8)(a0)
19 STR s9, REGOFF(9)(a0)
[all …]
/optee_os/core/arch/riscv/tee/
H A Dentry_fast.c22 args->a0 = OPTEE_ABI_RETURN_OK; in tee_entry_get_shm_config()
32 args->a0 = OPTEE_ABI_RETURN_UNKNOWN_FUNCTION; in tee_entry_fastcall_l2cc_mutex()
55 args->a0 = OPTEE_ABI_RETURN_ENOTAVAIL; in tee_entry_exchange_capabilities()
59 args->a0 = OPTEE_ABI_RETURN_OK; in tee_entry_exchange_capabilities()
96 args->a0 = OPTEE_ABI_RETURN_EBUSY; in tee_entry_disable_shm_cache()
101 args->a0 = OPTEE_ABI_RETURN_ENOTAVAIL; in tee_entry_disable_shm_cache()
105 args->a0 = OPTEE_ABI_RETURN_OK; in tee_entry_disable_shm_cache()
113 args->a0 = OPTEE_ABI_RETURN_OK; in tee_entry_enable_shm_cache()
115 args->a0 = OPTEE_ABI_RETURN_EBUSY; in tee_entry_enable_shm_cache()
122 args->a0 = OPTEE_ABI_RETURN_OK; in tee_entry_boot_secondary()
[all …]
/optee_os/core/arch/arm/tee/
H A Dentry_fast.c21 args->a0 = OPTEE_SMC_RETURN_OK; in tee_entry_get_shm_config()
33 args->a0 = OPTEE_SMC_RETURN_OK; in tee_entry_get_protmem_config()
37 args->a0 = OPTEE_SMC_RETURN_OK; in tee_entry_get_protmem_config()
41 args->a0 = OPTEE_SMC_RETURN_ENOTAVAIL; in tee_entry_get_protmem_config()
71 args->a0 = OPTEE_SMC_RETURN_EBADCMD; in tee_entry_fastcall_l2cc_mutex()
76 args->a0 = OPTEE_SMC_RETURN_UNKNOWN_FUNCTION; in tee_entry_fastcall_l2cc_mutex()
78 args->a0 = OPTEE_SMC_RETURN_EBADADDR; in tee_entry_fastcall_l2cc_mutex()
80 args->a0 = OPTEE_SMC_RETURN_OK; in tee_entry_fastcall_l2cc_mutex()
82 args->a0 = OPTEE_SMC_RETURN_UNKNOWN_FUNCTION; in tee_entry_fastcall_l2cc_mutex()
106 args->a0 = OPTEE_SMC_RETURN_ENOTAVAIL; in tee_entry_exchange_capabilities()
[all …]
/optee_os/core/drivers/wdt/
H A Dwatchdog_sm.c33 args->a0 = PSCI_RET_INTERNAL_FAILURE; in __wdt_sm_handler()
35 args->a0 = PSCI_RET_SUCCESS; in __wdt_sm_handler()
47 args->a0 = PSCI_RET_INVALID_PARAMETERS; in __wdt_sm_handler()
52 args->a0 = PSCI_RET_SUCCESS; in __wdt_sm_handler()
57 args->a0 = PSCI_RET_SUCCESS; in __wdt_sm_handler()
60 args->a0 = PSCI_RET_SUCCESS; in __wdt_sm_handler()
62 args->a0 = PSCI_RET_INVALID_PARAMETERS; in __wdt_sm_handler()
67 args->a0 = PSCI_RET_SUCCESS; in __wdt_sm_handler()
73 args->a0 = PSCI_RET_NOT_SUPPORTED; in __wdt_sm_handler()
75 args->a0 = PSCI_RET_INTERNAL_FAILURE; in __wdt_sm_handler()
[all …]
/optee_os/core/arch/arm/plat-stm32mp1/nsec-service/
H A Dstm32mp1_svc_setup.c19 switch (OPTEE_SMC_FUNC_NUM(args->a0)) { in sip_service()
21 args->a0 = STM32_SIP_SVC_FUNCTION_COUNT; in sip_service()
24 args->a0 = STM32_SIP_SVC_VERSION_MAJOR; in sip_service()
28 args->a0 = STM32_SIP_SVC_UID_0; in sip_service()
36 args->a0 = STM32_SIP_SVC_OK; in sip_service()
38 args->a0 = ARM_SMCCC_RET_NOT_SUPPORTED; in sip_service()
44 args->a0 = STM32_SIP_SVC_OK; in sip_service()
46 args->a0 = ARM_SMCCC_RET_NOT_SUPPORTED; in sip_service()
63 if (!OPTEE_SMC_IS_FAST_CALL(args->a0)) in sm_platform_handler()
66 switch (OPTEE_SMC_OWNER_NUM(args->a0)) { in sm_platform_handler()
/optee_os/core/drivers/
H A Dsmccc_trng.c65 args.a0 = ARM_SMCCC_VERSION; in smccc_trng_is_supported()
67 if (args.a0 & BIT32(31) || args.a0 < SMCCC_V_1_1) in smccc_trng_is_supported()
74 args.a0 = ARM_SMCCC_TRNG_VERSION; in smccc_trng_is_supported()
76 if (args.a0 & BIT32(31) || args.a0 < TRNG_VERSION_1_0) in smccc_trng_is_supported()
80 args.a0 = ARM_SMCCC_TRNG_FEATURES; in smccc_trng_is_supported()
83 if (args.a0 == ARM_SMCCC_RET_SUCCESS) { in smccc_trng_is_supported()
89 args.a0 = ARM_SMCCC_TRNG_FEATURES; in smccc_trng_is_supported()
92 if (args.a0 == ARM_SMCCC_RET_TRNG_SUCCESS) { in smccc_trng_is_supported()
147 args.a0 = trng_rnd_fid; in smccc_trng_read()
152 switch (args.a0) { in smccc_trng_read()
[all …]
/optee_os/core/arch/arm/sm/
H A Dpsci.c142 uint32_t smc_fid = args->a0; in tee_psci_handler()
149 args->a0 = psci_version(); in tee_psci_handler()
152 args->a0 = psci_cpu_suspend(a1, a2, a3, nsec); in tee_psci_handler()
155 args->a0 = psci_cpu_off(); in tee_psci_handler()
158 args->a0 = psci_cpu_on(a1, a2, a3); in tee_psci_handler()
161 args->a0 = psci_affinity_info(a1, a2); in tee_psci_handler()
164 args->a0 = psci_migrate(a1); in tee_psci_handler()
167 args->a0 = psci_migrate_info_type(); in tee_psci_handler()
170 args->a0 = psci_migrate_info_up_cpu(); in tee_psci_handler()
183 args->a0 = psci_features(a1); in tee_psci_handler()
[all …]
H A Dsm.c26 uint32_t smc_fid = args->a0; in smc_arch_handler()
31 args->a0 = SMCCC_V_1_1; in smc_arch_handler()
37 args->a0 = ARM_SMCCC_RET_SUCCESS; in smc_arch_handler()
40 args->a0 = ARM_SMCCC_RET_NOT_SUPPORTED; in smc_arch_handler()
45 args->a0 = ARM_SMCCC_RET_NOT_SUPPORTED; in smc_arch_handler()
49 args->a0 = ARM_SMCCC_RET_NOT_REQUIRED; in smc_arch_handler()
52 args->a0 = OPTEE_SMC_RETURN_UNKNOWN_FUNCTION; in smc_arch_handler()
78 switch (OPTEE_SMC_OWNER_NUM(args->a0)) { in sm_from_nsec()
H A Dstd_smc.c46 uint32_t smc_fid = args->a0; in smc_std_handler()
56 args->a0 = PSCI_NUM_CALLS; in smc_std_handler()
59 args->a0 = uuid.timeLow; in smc_std_handler()
71 args->a0 = STD_SVC_VERSION_MAJOR; in smc_std_handler()
75 args->a0 = OPTEE_SMC_RETURN_UNKNOWN_FUNCTION; in smc_std_handler()
/optee_os/core/arch/arm/plat-stm32mp2/
H A Dstm32mp_pm.c20 unsigned long thread_system_off_handler(unsigned long a0 __unused, in thread_system_off_handler()
34 static uint32_t get_pm_hint(unsigned long a0) in get_pm_hint() argument
39 if (a0 < PM_D2_LPLV_LEVEL) in get_pm_hint()
44 pm_hint |= ((a0 << PM_HINT_PLATFORM_STATE_SHIFT) & in get_pm_hint()
58 unsigned long thread_cpu_resume_handler(unsigned long a0, in thread_cpu_resume_handler() argument
63 retstatus = pm_change_state(PM_OP_RESUME, get_pm_hint(a0)); in thread_cpu_resume_handler()
83 unsigned long thread_cpu_suspend_handler(unsigned long a0, in thread_cpu_suspend_handler() argument
88 retstatus = pm_change_state(PM_OP_SUSPEND, get_pm_hint(a0)); in thread_cpu_suspend_handler()
/optee_os/core/arch/riscv/kernel/
H A Dthread_optee_abi_rv.S47 mv s0, a0
54 mv sp, a0
68 li a0, TEEABI_OPTEED_RETURN_CALL_DONE
89 STR a0, REGOFF(0)(sp)
102 store_xregs a0, THREAD_CTX_REG_RA, REG_RA, REG_TP
103 store_xregs a0, THREAD_CTX_REG_S0, REG_S0, REG_S1
104 store_xregs a0, THREAD_CTX_REG_S2, REG_S2, REG_S11
115 mv sp, a0
122 li a0, THREAD_FLAGS_COPY_ARGS_ON_RETURN
126 mv a4, a0 /* thread index */
[all …]
H A Dentry.S124 csrr a0, CSR_MHARTID
126 mv s0, a0 /* Save hart ID into s0 */
148 li a0, 0
220 STR a0, THREAD_CORE_LOCAL_ABT_STACK_VA_END(tp)
221 li a0, THREAD_ID_INVALID
222 sh a0, THREAD_CORE_LOCAL_CURR_THREAD(tp)
223 li a0, THREAD_CLF_TMP
224 sw a0, THREAD_CORE_LOCAL_FLAGS(tp)
230 la a0, __vcore_free_start
241 li a0, CFG_CORE_ASLR_SEED
[all …]
H A Dspinlock.S15 mv s0, a0
17 mv a0, s0
19 addiw a0, a0, 0
20 bnez a0, 1b
31 amoswap.w x0, x0, 0(a0)
38 amoswap.w a0, t0, 0(a0)
H A Dthread_rv.S41 lw a0, THREAD_CORE_LOCAL_HART_INDEX(tp)
62 csrr a0, CSR_XCAUSE
64 bge a0, zero, exception_from_kernel
68 get_thread_ctx sp, a0
101 mv a0, sp
179 lw a0, THREAD_CORE_LOCAL_FLAGS(tp)
180 slli a0, a0, THREAD_CLF_SAVED_SHIFT
181 ori a0, a0, THREAD_CLF_ABORT
183 and a1, a0, a1
193 ori a0, a0, THREAD_CLF_TMP /* flags |= THREAD_CLF_TMP; */
[all …]
H A Dcsr_detect.S36 csrr a0, CSR_XEPC
37 addi a0, a0, 4
38 csrw CSR_XEPC, a0
39 mv a0, zero
45 li a0, 1
H A Darch_scall_rv.S23 mv t0, a0
32 load_xregs a0, THREAD_SCALL_REG_A0, 10, 17
59 mv a2, a0 /* code */
60 li a0, TEE_ERROR_TARGET_DEAD
/optee_os/core/arch/arm/plat-ti/
H A Dsm_platform_handler_a9.c26 uint16_t sip_func = OPTEE_SMC_FUNC_NUM(smc_args->a0); in ti_sip_handler()
35 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
39 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
44 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
48 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
52 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
57 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
61 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
65 smc_args->a0 = OPTEE_SMC_RETURN_EBADCMD; in ti_sip_handler()
H A Dsm_platform_handler_a15.c43 uint16_t sip_func = OPTEE_SMC_FUNC_NUM(smc_args->a0); in ti_sip_handler()
49 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
54 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
58 smc_args->a0 = OPTEE_SMC_RETURN_OK; in ti_sip_handler()
62 smc_args->a0 = OPTEE_SMC_RETURN_EBADCMD; in ti_sip_handler()
/optee_os/core/arch/arm/plat-imx/
H A Dsm_platform_handler.c20 uint16_t sip_func = OPTEE_SMC_FUNC_NUM(smc_args->a0); in imx_sip_handler()
25 smc_args->a0 = pl310_enable(); in imx_sip_handler()
28 smc_args->a0 = pl310_disable(); in imx_sip_handler()
31 smc_args->a0 = pl310_enable_writeback(); in imx_sip_handler()
34 smc_args->a0 = pl310_disable_writeback(); in imx_sip_handler()
37 smc_args->a0 = pl310_enable_wflz(); in imx_sip_handler()
42 smc_args->a0 = OPTEE_SMC_RETURN_EBADCMD; in imx_sip_handler()
/optee_os/core/arch/arm/plat-sam/nsec-service/
H A Dsm_platform_handler.c26 switch (OPTEE_SMC_FUNC_NUM(args->a0)) { in sam_sip_handler()
29 args->a0 = pl310_enable(); in sam_sip_handler()
32 args->a0 = pl310_disable(); in sam_sip_handler()
35 args->a0 = pl310_enable_writeback(); in sam_sip_handler()
38 args->a0 = pl310_disable_writeback(); in sam_sip_handler()
43 args->a0 = SAMA5_SMC_SIP_RETURN_SUCCESS; in sam_sip_handler()
51 args->a0 = SAMA5_SMC_SIP_RETURN_SUCCESS; in sam_sip_handler()
/optee_os/lib/libutils/isoc/arch/arm/softfloat/source/include/
H A Dprimitives.h201 bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) in softfloat_eq128() argument
202 { return (a64 == b64) && (a0 == b0); } in softfloat_eq128()
204 bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
216 bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) in softfloat_le128() argument
217 { return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); } in softfloat_le128()
219 bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
231 bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ) in softfloat_lt128() argument
232 { return (a64 < b64) || ((a64 == b64) && (a0 < b0)); } in softfloat_lt128()
234 bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
246 softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t count ) in softfloat_shortShiftLeft128() argument
[all …]
/optee_os/lib/libutils/isoc/arch/arm/softfloat/source/
H A Ds_shiftRightJam128.c45 softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t count ) in softfloat_shiftRightJam128() argument
54 a64<<(negCount & 63) | a0>>count in softfloat_shiftRightJam128()
55 | ((uint64_t) (a0<<(negCount & 63)) != 0); in softfloat_shiftRightJam128()
61 | (((a64 & (((uint_fast64_t) 1<<(count & 63)) - 1)) | a0) in softfloat_shiftRightJam128()
63 : ((a64 | a0) != 0); in softfloat_shiftRightJam128()
H A Ds_shiftRightJam128Extra.c46 uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t count ) in softfloat_shiftRightJam128Extra() argument
54 z.v.v0 = a64<<(negCount & 63) | a0>>count; in softfloat_shiftRightJam128Extra()
55 z.extra = a0<<(negCount & 63); in softfloat_shiftRightJam128Extra()
60 z.extra = a0; in softfloat_shiftRightJam128Extra()
62 extra |= a0; in softfloat_shiftRightJam128Extra()
/optee_os/core/arch/riscv/include/
H A Driscv_macros.S57 mv a0, \reg_op0
59 mv a2, a0
60 li a0, 0
64 add a0, a0, a2
69 add \reg_res, \reg_res, a0
/optee_os/lib/libutils/ext/arch/riscv/
H A Datomic_rv.S11 amoadd.w.aqrl a2, a1, (a0)
12 add a0, a1, a2
19 amoadd.w.aqrl a2, a1, (a0)
20 add a0, a1, a2

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