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Searched refs:TZDRAM_BASE (Results 1 – 13 of 13) sorted by relevance

/optee_os/core/arch/arm/plat-zynq7k/
H A Dplatform_config.h197 #define TZDRAM_BASE 0x3e100000 macro
203 #define TA_RAM_START TZDRAM_BASE
231 #define TZDRAM_BASE 0x3E000000 macro
234 #define TEE_RAM_START TZDRAM_BASE
237 #define TA_RAM_START (TZDRAM_BASE + TEE_RAM_PH_SIZE)
240 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
/optee_os/core/arch/arm/plat-poplar/
H A Dplatform_config.h119 #define TZDRAM_BASE 0x03200000 macro
124 #define TA_RAM_START ROUNDUP(TZDRAM_BASE, CORE_MMU_PGDIR_SIZE)
129 #define TZDRAM_BASE 0x03000000 macro
132 #define TEE_RAM_START TZDRAM_BASE
134 #define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \
/optee_os/core/arch/arm/plat-sprd/
H A Dplatform_config.h54 #define TZDRAM_BASE 0x8f600000 macro
57 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
82 #define TEE_RAM_START TZDRAM_BASE
83 #define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \
/optee_os/core/arch/arm/plat-ti/
H A Dplatform_config.h15 #define TZDRAM_BASE 0xbdb00000 macro
59 #define TZDRAM_BASE 0xbdb00000 macro
129 #define TEE_RAM_START TZDRAM_BASE
134 #define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \
141 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
H A Dmain.c30 register_phys_mem(MEM_AREA_RAM_SEC, TZDRAM_BASE, TEE_RAM_VA_SIZE);
/optee_os/core/arch/arm/include/mm/
H A Dgeneric_ram_layout.h143 #define TZDRAM_BASE CFG_TZDRAM_START macro
148 #define TZDRAM_BASE ROUNDUP(TZSRAM_BASE + TZSRAM_SIZE, \ macro
151 TZDRAM_BASE))
158 #define TEE_RAM_START TZDRAM_BASE
H A Dcore_mmu_arch.h35 #ifdef TZDRAM_BASE
39 #define TRUSTED_DRAM_BASE TZDRAM_BASE
/optee_os/core/arch/arm/plat-stm/
H A Dplatform_config.h189 #define STM_SECDDR_BASE MIN_UNSAFE(TZSRAM_BASE, TZDRAM_BASE)
191 TZDRAM_BASE + TZDRAM_SIZE)
196 #define STM_SECDDR_BASE TZDRAM_BASE
197 #define STM_SECDDR_END (TZDRAM_BASE + TZDRAM_SIZE)
/optee_os/core/arch/arm/plat-rzg/
H A Dplatform_config.h50 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
/optee_os/core/arch/arm/plat-rcar/
H A Dplatform_config.h109 #define TEE_SHMEM_START (TZDRAM_BASE + TZDRAM_SIZE)
/optee_os/core/arch/arm/plat-marvell/armada3700/
H A Dhal_sec_perf.c62 #define RA_ADDR TZDRAM_BASE
/optee_os/core/arch/arm/plat-marvell/armada7k8k/
H A Dhal_sec_perf.c61 #define RA_ADDR TZDRAM_BASE
/optee_os/core/drivers/firewall/
H A Dstm32_risaf.c574 if (paddr == TZDRAM_BASE && size == TZDRAM_SIZE) in stm32_risaf_acquire_access()
799 if (regions[i].addr == TZDRAM_BASE && in stm32_risaf_probe()