Searched refs:RCC_PLLNCFGR1_DIVN_SHIFT (Results 1 – 3 of 3) sorted by relevance
320 #define RCC_PLLNCFGR1_DIVN_SHIFT 0 macro
1763 #define RCC_PLLNCFGR1_DIVN_SHIFT 0 macro
1100 *value |= (divn << RCC_PLLNCFGR1_DIVN_SHIFT) & RCC_PLLNCFGR1_DIVN_MASK; in clk_stm32_pll_compute_cfgr1()