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Searched refs:RCC_PLL5CFGR1 (Results 1 – 4 of 4) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c401 GATE_CFG(GATE_PLL5, RCC_PLL5CFGR1, 8, 0),
402 GATE_CFG(GATE_PLL5_RDY, RCC_PLL5CFGR1, 24, 0),
410 GATE_CFG(GATE_PLL5_CKREFST, RCC_PLL5CFGR1, 28, 0),
999 CLK_PLL_CFG(PLL5_ID, GATE_PLL5, MUX_MUXSEL1, RCC_PLL5CFGR1),
2661 static STM32_PLLS(ck_pll5, 0, RCC_PLL5CFGR1, GATE_PLL5, MUX_MUXSEL1);
H A Dclk-stm32mp25.c395 GATE_CFG(GATE_PLL5, RCC_PLL5CFGR1, 8, 0),
396 GATE_CFG(GATE_PLL5_RDY, RCC_PLL5CFGR1, 24, 0),
404 GATE_CFG(GATE_PLL5_CKREFST, RCC_PLL5CFGR1, 28, 0),
1018 CLK_PLL_CFG(PLL5_ID, GATE_PLL5, MUX_MUXSEL1, RCC_PLL5CFGR1),
2653 static STM32_PLLS(ck_pll5, 0, RCC_PLL5CFGR1, GATE_PLL5, MUX_MUXSEL1);
/optee_os/core/include/drivers/
H A Dstm32mp21_rcc.h620 #define RCC_PLL5CFGR1 U(0x1388) macro
H A Dstm32mp25_rcc.h681 #define RCC_PLL5CFGR1 U(0x1388) macro