Searched refs:tim1 (Results 1 – 5 of 5) sorted by relevance
393 u32 tim1 = 0, val = 0; in get_sdram_tim_1_shdw() local396 tim1 |= val << T_WTR_SHIFT; in get_sdram_tim_1_shdw()402 tim1 |= (val - 1) << T_RRD_SHIFT; in get_sdram_tim_1_shdw()405 tim1 |= val << T_RC_SHIFT; in get_sdram_tim_1_shdw()408 tim1 |= (val - 1) << T_RAS_SHIFT; in get_sdram_tim_1_shdw()411 tim1 |= val << T_WR_SHIFT; in get_sdram_tim_1_shdw()414 tim1 |= val << T_RCD_SHIFT; in get_sdram_tim_1_shdw()417 tim1 |= val << T_RP_SHIFT; in get_sdram_tim_1_shdw()419 return tim1; in get_sdram_tim_1_shdw()426 u32 tim1 = 0, val = 0; in get_sdram_tim_1_shdw_derated() local[all …]
600 u32 tim1 = 0, val = 0; in get_sdram_tim_1_reg() local602 tim1 |= val << EMIF_REG_T_WTR_SHIFT; in get_sdram_tim_1_reg()610 tim1 |= val << EMIF_REG_T_RRD_SHIFT; in get_sdram_tim_1_reg()613 tim1 |= val << EMIF_REG_T_RC_SHIFT; in get_sdram_tim_1_reg()616 tim1 |= val << EMIF_REG_T_RAS_SHIFT; in get_sdram_tim_1_reg()619 tim1 |= val << EMIF_REG_T_WR_SHIFT; in get_sdram_tim_1_reg()622 tim1 |= val << EMIF_REG_T_RCD_SHIFT; in get_sdram_tim_1_reg()625 tim1 |= val << EMIF_REG_T_RP_SHIFT; in get_sdram_tim_1_reg()627 return tim1; in get_sdram_tim_1_reg()
66 u32 tim1; member164 regs->tim1 = val; in clcdfb_decode()
531 unsigned int *tim1, unsigned int *tim2, in pci9118_calc_divisors() argument540 *div2 = *tim1 / pacer->osc_base; /* scan timer */ in pci9118_calc_divisors()553 *tim1 = *div1 * *div2 * pacer->osc_base; in pci9118_calc_divisors()
310 writel(regs.tim1, fb->regs + CLCD_TIM1); in clcdfb_set_par()