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Searched refs:esc_clk (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/video/exynos/
H A Dexynos_mipi_dsi_common.c110 delay_val = MHZ / dsim->dsim_config->esc_clk; in exynos_mipi_dsi_wr_data()
374 esc_div = byte_clk / (dsim->dsim_config->esc_clk); in exynos_mipi_dsi_set_clock()
376 esc_div, byte_clk, dsim->dsim_config->esc_clk); in exynos_mipi_dsi_set_clock()
378 (byte_clk / esc_div) > dsim->dsim_config->esc_clk) in exynos_mipi_dsi_set_clock()
397 (dsim->dsim_config->esc_clk / MHZ)); in exynos_mipi_dsi_set_clock()
H A Dexynos_mipi_dsi.c277 dt->esc_clk = fdtdec_get_int(blob, node, in exynos_dsim_config_parse_dt()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c109 struct clk *esc_clk; member
349 msm_host->esc_clk_src = clk_get_parent(msm_host->esc_clk); in dsi_clk_init_v2()
420 msm_host->esc_clk = msm_clk_get(pdev, "core"); in dsi_clk_init()
421 if (IS_ERR(msm_host->esc_clk)) { in dsi_clk_init()
422 ret = PTR_ERR(msm_host->esc_clk); in dsi_clk_init()
425 msm_host->esc_clk = NULL; in dsi_clk_init()
550 ret = clk_prepare_enable(msm_host->esc_clk); in dsi_link_clk_enable_6g()
584 clk_disable_unprepare(msm_host->esc_clk); in dsi_link_clk_enable_6g()
603 ret = clk_set_rate(msm_host->esc_clk, msm_host->esc_clk_rate); in dsi_link_clk_set_rate_v2()
634 ret = clk_prepare_enable(msm_host->esc_clk); in dsi_link_clk_enable_v2()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Dcdns,csi2tx.txt13 * esc_clk: escape mode clock
49 clock-names = "p_clk", "esc_clk",
/OK3568_Linux_fs/kernel/drivers/media/platform/cadence/
H A Dcdns-csi2tx.c105 struct clk *esc_clk; member
451 csi2tx->esc_clk = devm_clk_get(&pdev->dev, "esc_clk"); in csi2tx_get_resources()
452 if (IS_ERR(csi2tx->esc_clk)) { in csi2tx_get_resources()
454 return PTR_ERR(csi2tx->esc_clk); in csi2tx_get_resources()
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/include/mach/
H A Dmipi_dsim.h220 unsigned long esc_clk; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/exynos/
H A Dexynos_drm_dsi.c655 unsigned long hs_clk, byte_clk, esc_clk; in exynos_dsi_enable_clock() local
667 esc_clk = byte_clk / esc_div; in exynos_dsi_enable_clock()
669 if (esc_clk > 20 * MHZ) { in exynos_dsi_enable_clock()
671 esc_clk = byte_clk / esc_div; in exynos_dsi_enable_clock()
675 hs_clk, byte_clk, esc_clk); in exynos_dsi_enable_clock()