Searched refs:dv_psc_regs (Results 1 – 2 of 2) sorted by relevance
252 writel(((readl(&dv_psc_regs->mdctl[DAVINCI_LPSC_VPSSMASTER]) & in dm365_vpss_sync_reset()254 &dv_psc_regs->mdctl[DAVINCI_LPSC_VPSSMASTER]); in dm365_vpss_sync_reset()256 writel((1 << PdNum), &dv_psc_regs->ptcmd); in dm365_vpss_sync_reset()258 while (!(((readl(&dv_psc_regs->ptstat) >> PdNum) & PSC_GOSTAT) == 0)) in dm365_vpss_sync_reset()260 while (!((readl(&dv_psc_regs->mdstat[DAVINCI_LPSC_VPSSMASTER]) & in dm365_vpss_sync_reset()338 setbits_le32(&dv_psc_regs->mdctl[i], PSC_ENABLE); in dm365_psc_init()345 writel((1 << PdNum), &dv_psc_regs->ptcmd); in dm365_psc_init()350 while (!(((readl(&dv_psc_regs->ptstat) >> PdNum) & PSC_GOSTAT) in dm365_psc_init()356 while (!((readl(&dv_psc_regs->mdstat[i]) & in dm365_psc_init()
14 struct dv_psc_regs { struct68 #define dv_psc_regs ((struct dv_psc_regs *)DAVINCI_PWR_SLEEP_CNTRL_BASE) argument