Searched refs:dsgcr (Results 1 – 7 of 7) sorted by relevance
149 writel(MCTL_DSGCR, &mctl_phy->dsgcr); in mctl_channel_init()284 clrbits_le32(&mctl_phy1->dsgcr, MCTL_DSGCR_ENABLE); in mctl_com_init()
633 clrbits_le32(&mctl_phy->dsgcr, (3 << 6)); in mctl_channel_init()736 setbits_le32(&mctl_phy->dsgcr, 0xf << 24); /* unclear what this is... */ in mctl_channel_init()
105 u32 dsgcr; /* 0x84 DRAM system general config register */ member
180 u32 dsgcr; /* 0x40 dram system general config register */ member
169 u32 dsgcr; /* 0x2c dram system general config register */ member
177 u32 dsgcr; member
337 clrsetbits_le32(&publ->dsgcr, in phy_cfg()