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Searched refs:cs_enable_reg_val (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_centralization.c77 u32 cs_enable_reg_val[MAX_INTERFACE_NUM]; in ddr3_tip_centralization() local
89 CS_ENABLE_REG, cs_enable_reg_val, MASK_ALL_BITS)); in ddr3_tip_centralization()
487 cs_enable_reg_val[if_id], in ddr3_tip_centralization()
509 u32 cs_enable_reg_val[MAX_INTERFACE_NUM]; in ddr3_tip_special_rx() local
524 cs_enable_reg_val, in ddr3_tip_special_rx()
H A Dddr3_training_leveling.c69 u32 cs_enable_reg_val[MAX_INTERFACE_NUM] = { 0 }; in ddr3_tip_dynamic_read_leveling() local
164 CS_ENABLE_REG, cs_enable_reg_val, in ddr3_tip_dynamic_read_leveling()
421 CS_ENABLE_REG, cs_enable_reg_val[if_id], in ddr3_tip_dynamic_read_leveling()
533 u32 cs_enable_reg_val[MAX_INTERFACE_NUM]; /* save current CS value */ in ddr3_tip_dynamic_per_bit_read_leveling() local
565 CS_ENABLE_REG, &cs_enable_reg_val[if_id], in ddr3_tip_dynamic_per_bit_read_leveling()
900 CS_ENABLE_REG, cs_enable_reg_val[if_id], in ddr3_tip_dynamic_per_bit_read_leveling()
960 u32 cs_enable_reg_val[MAX_INTERFACE_NUM] = { 0 }; in ddr3_tip_dynamic_write_leveling() local
992 CS_ENABLE_REG, cs_enable_reg_val, MASK_ALL_BITS)); in ddr3_tip_dynamic_write_leveling()
1284 CS_ENABLE_REG, cs_enable_reg_val[if_id], in ddr3_tip_dynamic_write_leveling()
H A Dddr3_training_pbs.c55 u32 cs_enable_reg_val[MAX_INTERFACE_NUM]; in ddr3_tip_pbs() local
67 CS_ENABLE_REG, cs_enable_reg_val, MASK_ALL_BITS)); in ddr3_tip_pbs()
872 CS_ENABLE_REG, cs_enable_reg_val[if_id], in ddr3_tip_pbs()