Searched refs:ZYNQMP_CSU_IDCODE_SVD_SHIFT (Results 1 – 2 of 2) sorted by relevance
22 #define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12 macro23 #define ZYNQMP_CSU_IDCODE_SVD_MASK (0x7 << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
104 regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; in chip_id()121 val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; in chip_id()