Home
last modified time | relevance | path

Searched refs:XOR_SIZE_MASK_REG (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c32 xor_regs_mask_backup[ui] = reg_read(XOR_SIZE_MASK_REG(0, ui)); in mv_sys_xor_init()
48 reg_write(XOR_SIZE_MASK_REG(0, dram_info->num_cs), 0x03FF0000); in mv_sys_xor_init()
75 reg_write(XOR_SIZE_MASK_REG(0, cs_count), 0x0FFF0000); in mv_sys_xor_init()
93 reg_write(XOR_SIZE_MASK_REG(0, ui), xor_regs_mask_backup[ui]); in mv_sys_xor_finish()
H A Dxor_regs.h99 #define XOR_SIZE_MASK_REG(unit, win) (MV_XOR_REGS_BASE(unit) + (0x270 + ((win) * 4))) macro
/OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/
H A Ddram.c126 xor_mask_save = reg_read(XOR_SIZE_MASK_REG(SCRB_XOR_UNIT, in mv_xor_init2()
145 reg_write(XOR_SIZE_MASK_REG(SCRB_XOR_UNIT, SCRB_XOR_WIN), size); in mv_xor_init2()
159 reg_write(XOR_SIZE_MASK_REG(SCRB_XOR_UNIT, SCRB_XOR_WIN), in mv_xor_finish2()
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.c38 reg_read(XOR_SIZE_MASK_REG(0, ui)); in mv_sys_xor_init()
76 reg_write(XOR_SIZE_MASK_REG(0, cs_count), 0x7fff0000); in mv_sys_xor_init()
95 reg_write(XOR_SIZE_MASK_REG(0, ui), in mv_sys_xor_finish()
H A Dxor_regs.h186 #define XOR_SIZE_MASK_REG(unit, win_num) (MV_XOR_REGS_BASE(unit) + \ macro