Searched refs:VPLL1 (Results 1 – 5 of 5) sorted by relevance
| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3308.c | 82 [VPLL1] = PLL(pll_rk3328, PLL_VPLL1, RK3308_PLL_CON(24),
192 priv->vpll1_hz = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1], in rk3308_clk_get_pll_rate()
193 priv->cru, VPLL1); in rk3308_clk_get_pll_rate()
272 pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1], in rk3308_mac_set_clk()
273 priv->cru, VPLL1); in rk3308_mac_set_clk()
951 rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1], in rk3308_clk_get_rate()
952 priv->cru, VPLL1); in rk3308_clk_get_rate()
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| /OK3568_Linux_fs/kernel/drivers/regulator/ |
| H A D | twl-regulator.c | 532 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
567 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/ |
| H A D | twl-regulator.txt | 44 - "ti,twl4030-vpll1" for VPLL1 LDO
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3308.h | 38 VPLL1, enumerator
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| /OK3568_Linux_fs/u-boot/drivers/ram/rockchip/ |
| H A D | sdram_rk3308.c | 138 pll_set(VPLL1, priv, &rk3308_pll_div); in rkdclk_init()
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