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Searched refs:TEGRA210_CLK_PLL_P (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-tegra210.c2402 [tegra_clk_pll_p] = { .dt_id = TEGRA210_CLK_PLL_P, .present = true },
2520 { .con_id = "pll_p", .dt_id = TEGRA210_CLK_PLL_P },
3497 { TEGRA210_CLK_UARTA, TEGRA210_CLK_PLL_P, 408000000, 0 },
3498 { TEGRA210_CLK_UARTB, TEGRA210_CLK_PLL_P, 408000000, 0 },
3499 { TEGRA210_CLK_UARTC, TEGRA210_CLK_PLL_P, 408000000, 0 },
3500 { TEGRA210_CLK_UARTD, TEGRA210_CLK_PLL_P, 408000000, 0 },
3508 { TEGRA210_CLK_HOST1X, TEGRA210_CLK_PLL_P, 136000000, 1 },
3509 { TEGRA210_CLK_SCLK_MUX, TEGRA210_CLK_PLL_P, 0, 1 },
3511 { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 },
3512 { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 },
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/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Dtegra210-car.h271 #define TEGRA210_CLK_PLL_P 243 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dtegra210-car.h274 #define TEGRA210_CLK_PLL_P 243 macro
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-host1x.txt410 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>,
411 <&tegra_car TEGRA210_CLK_PLL_P>,
412 <&tegra_car TEGRA210_CLK_PLL_P>;
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dtegra210.dtsi124 <&tegra_car TEGRA210_CLK_PLL_P>;
139 <&tegra_car TEGRA210_CLK_PLL_P>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/
H A Dtegra210.dtsi163 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>,
164 <&tegra_car TEGRA210_CLK_PLL_P>,
165 <&tegra_car TEGRA210_CLK_PLL_P>;