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Searched refs:RK3568_VP0_DSP_CTRL (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_reg.c778 .out_mode = VOP_REG(RK3568_VP0_DSP_CTRL, 0xf, 0),
779 .core_dclk_div = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 4),
782 .p2i_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 5),
783 .dsp_filed_pol = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 6),
784 .dsp_interlace = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 7),
785 .dsp_data_swap = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1f, 8),
786 .dsp_x_mir_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 13),
787 .post_dsp_out_r2y = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 15),
788 .pre_dither_down_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 16),
789 .dither_down_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 17),
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H A Drockchip_vop_reg.h1115 #define RK3568_VP0_DSP_CTRL 0xC00 macro
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip_vop2.c323 #define RK3568_VP0_DSP_CTRL 0xC00 macro
1637 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, in rk3568_vop2_load_lut()
1654 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, in rk3588_vop2_load_lut()
1656 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, in rk3588_vop2_load_lut()
3228 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, in vop2_post_color_swap()
3587 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK, in rockchip_vop2_send_mcu_cmd()
3629 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK, in rockchip_vop2_send_mcu_cmd()
3726 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, OUT_MODE_MASK, in rockchip_vop2_init()
3764 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK, in rockchip_vop2_init()
3766 vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK, in rockchip_vop2_init()
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