Searched refs:REG_SET_0x60_0_8_Y_DLY (Results 1 – 2 of 2) sorted by relevance
93 #define REG_SET_0x60_0_8_Y_DLY(ch, val) vd_register_set ( 0 , 0x00 , 0x60 + ch , val , 0 , 8 ) macro
350 REG_SET_0x60_0_8_Y_DLY( ch, param->y_delay ); in vd_vi_h_timing_set_seq5()