Searched refs:REG_SET_0x0C_0_8_SPL_MODE (Results 1 – 2 of 2) sorted by relevance
76 #define REG_SET_0x0C_0_8_SPL_MODE(ch, val) vd_register_set ( 0 , 0x00 , 0x0c + ch , val , 0 , 8 ) macro
248 REG_SET_0x0C_0_8_SPL_MODE( ch, param->spl_mode ); in vd_vi_format_set_seq3()