Searched refs:PCLK_DP0 (Results 1 – 4 of 4) sorted by relevance
486 #define PCLK_DP0 486 macro
1799 GATE(PCLK_DP0, "pclk_dp0", "pclk_vo0_root", 0,
4917 clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>,