Searched refs:PCIECFGREG_PM_CSR_STATE_MASK (Results 1 – 12 of 12) sorted by relevance
826 #define PCIECFGREG_PM_CSR_STATE_MASK 0x00000003 macro
1006 #define PCIECFGREG_PM_CSR_STATE_MASK 0x00000003 macro
1081 #define PCIECFGREG_PM_CSR_STATE_MASK 0x00000003 macro
673 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()693 pm_csr &= ~PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()708 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()
1265 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()1285 pm_csr &= ~PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()1300 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()
1257 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()1277 pm_csr &= ~PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()1292 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()
1605 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()1625 pm_csr &= ~PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()1640 cur_state = pm_csr & PCIECFGREG_PM_CSR_STATE_MASK; in dhdpcie_set_pwr_state()