Searched refs:NUM_SYS_CLKS (Results 1 – 4 of 4) sorted by relevance
32 static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {43 static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {54 core_dpll_params_2128mhz_ddr532[NUM_SYS_CLKS] = {65 core_dpll_params_2128mhz_ddr532_es2[NUM_SYS_CLKS] = {76 core_dpll_params_2128mhz_dra7xx[NUM_SYS_CLKS] = {86 static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {96 static const struct dpll_params per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {106 static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {116 static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {126 static const struct dpll_params iva_dpll_params_2330mhz_dra7xx[NUM_SYS_CLKS] = {[all …]
190 static const struct srcomp_params srcomp_parameters[NUM_SYS_CLKS] = {
40 static const struct dpll_params mpu_dpll_params_1400mhz[NUM_SYS_CLKS] = {55 static const struct dpll_params mpu_dpll_params_1600mhz[NUM_SYS_CLKS] = {69 static const struct dpll_params mpu_dpll_params_1200mhz[NUM_SYS_CLKS] = {81 static const struct dpll_params core_dpll_params_1600mhz[NUM_SYS_CLKS] = {92 static const struct dpll_params core_dpll_params_es1_1524mhz[NUM_SYS_CLKS] = {104 core_dpll_params_es2_1600mhz_ddr200mhz[NUM_SYS_CLKS] = {114 static const struct dpll_params per_dpll_params_1536mhz[NUM_SYS_CLKS] = {124 static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {137 abe_dpll_params_sysclk_196608khz[NUM_SYS_CLKS] = {153 static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {
16 #define NUM_SYS_CLKS 7 macro