Searched refs:MSR_IA32_APICBASE_ENABLE (Results 1 – 10 of 10) sorted by relevance
26 LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE,27 LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,189 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()190 return MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()258 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
2197 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()2260 if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) in kvm_lapic_set_base()2267 if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) { in kvm_lapic_set_base()2268 if (value & MSR_IA32_APICBASE_ENABLE) { in kvm_lapic_set_base()2282 if ((old_value ^ value) & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) in kvm_lapic_set_base()2288 if ((value & MSR_IA32_APICBASE_ENABLE) && in kvm_lapic_set_base()2321 MSR_IA32_APICBASE_ENABLE); in kvm_lapic_reset()2470 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()
119 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); in kvm_update_cpuid_runtime()
73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic()86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
1234 l &= ~MSR_IA32_APICBASE_ENABLE; in disable_local_APIC()1969 if (l & MSR_IA32_APICBASE_ENABLE) in apic_verify()1991 if (!(l & MSR_IA32_APICBASE_ENABLE)) { in apic_force_enable()1994 l |= MSR_IA32_APICBASE_ENABLE | addr; in apic_force_enable()2665 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; in lapic_resume()
373 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro
667 #define MSR_IA32_APICBASE_ENABLE (1<<11) macro
1274 MSR_IA32_APICBASE_ENABLE; in svm_vcpu_reset()
4499 MSR_IA32_APICBASE_ENABLE; in vmx_vcpu_reset()