Searched refs:IMX7ULP_CLK_WDG1 (Results 1 – 5 of 5) sorted by relevance
89 #define IMX7ULP_CLK_WDG1 23 macro
79 #define IMX7ULP_CLK_WDG1 62 macro
260 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
351 clocks = <&clks IMX7ULP_CLK_WDG1>;352 assigned-clocks = <&clks IMX7ULP_CLK_WDG1>;
172 …hws[IMX7ULP_CLK_WDG1] = imx7ulp_clk_hw_composite("wdg1", periph_bus_sels, ARRAY_SIZE(periph_bu… in imx7ulp_clk_pcc2_init()