Searched refs:D_BDW (Results 1 – 2 of 2) sorted by relevance
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio.h | 44 #define D_BDW (1 << 0) macro 51 #define D_GEN8PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) 54 #define D_BDW_PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) 56 #define D_PRE_SKL (D_BDW) 57 #define D_ALL (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
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| H A D | handlers.c | 55 return D_BDW; in intel_gvt_get_device_type() 2568 MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL); in init_generic_mmio_info() 2600 MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2601 MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2602 MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2603 MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2604 MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2605 MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2876 MMIO_D(WM_MISC, D_BDW); in init_bdw_mmio_info() 2877 MMIO_D(_MMIO(_SRD_CTL_EDP), D_BDW); in init_bdw_mmio_info() [all …]
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