Searched refs:DXnGSR0 (Results 1 – 4 of 4) sorted by relevance
253 low_data_lines_status = (readl(DXnGSR0(0)) >> 24) & 0x03; in mctl_channel_init()254 high_data_lines_status = (readl(DXnGSR0(1)) >> 24) & 0x03; in mctl_channel_init()
345 low_data_lines_status = (readl(DXnGSR0(0)) >> 24) & 0x03; in mctl_channel_init()346 high_data_lines_status = (readl(DXnGSR0(1)) >> 24) & 0x03; in mctl_channel_init()
148 #define DXnGSR0(x) (SUNXI_DRAM_CTL0_BASE + 0x00000348 + 0x80 * x) macro
153 #define DXnGSR0(x) (SUNXI_DRAM_CTL0_BASE + 0x00000348 + 0x80 * x) macro