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Searched refs:DSP_HOLD_VALID_INTR (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_vop_reg.c379 DSP_HOLD_VALID_INTR,
444 DSP_HOLD_VALID_INTR,
1235 DSP_HOLD_VALID_INTR,
1416 DSP_HOLD_VALID_INTR,
1756 DSP_HOLD_VALID_INTR,
H A Drockchip_drm_vop.h1368 #define DSP_HOLD_VALID_INTR BIT(0) macro
1389 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
H A Drockchip_drm_vop.c1316 VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
1317 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
1331 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); in vop_dsp_hold_valid_irq_disable()
4378 if (active_irqs & DSP_HOLD_VALID_INTR) { in vop_isr()
4380 active_irqs &= ~DSP_HOLD_VALID_INTR; in vop_isr()
H A Drockchip_drm_vop2.c2966 VOP_INTR_SET_TYPE(vop2, intr, clear, DSP_HOLD_VALID_INTR, 1); in vop2_dsp_hold_valid_irq_enable()
2967 VOP_INTR_SET_TYPE(vop2, intr, enable, DSP_HOLD_VALID_INTR, 1); in vop2_dsp_hold_valid_irq_enable()
2986 VOP_INTR_SET_TYPE(vop2, intr, enable, DSP_HOLD_VALID_INTR, 0); in vop2_dsp_hold_valid_irq_disable()
10680 if (active_irqs & DSP_HOLD_VALID_INTR) { in vop2_isr()
10682 active_irqs &= ~DSP_HOLD_VALID_INTR; in vop2_isr()
H A Drockchip_vop2_reg.c548 DSP_HOLD_VALID_INTR,