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Searched refs:CLK_TOP_AUD_48K_TIMING (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Dmt2701-afe-pcm.txt71 <&topckgen CLK_TOP_AUD_48K_TIMING>,
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt2701-clk.h157 #define CLK_TOP_AUD_48K_TIMING 146 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt2701.c648 GATE_TOP_AUD(CLK_TOP_AUD_48K_TIMING, "a1sys_hp_ck", "aud_mux1_div",
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmt2701.dtsi438 <&topckgen CLK_TOP_AUD_48K_TIMING>,
H A Dmt7623.dtsi606 <&topckgen CLK_TOP_AUD_48K_TIMING>,