Searched refs:CLK_SATA_PHYI2C (Results 1 – 3 of 3) sorted by relevance
91 #define CLK_SATA_PHYI2C 288 macro
570 GATE(CLK_SATA_PHYI2C, "sata_phyi2c", "div_aclk200", GATE_IP_FSYS, 25, 0,
473 clocks = <&clock CLK_SATA_PHYI2C>;