Searched refs:BUS_WIDTH_IN_BITS (Results 1 – 5 of 5) sorted by relevance
19 u8 result_mat[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];22 u8 result_all_bit[MAX_BUS_NUM * BUS_WIDTH_IN_BITS * MAX_INTERFACE_NUM];106 for (bit = 0; bit < BUS_WIDTH_IN_BITS; bit++) { in ddr3_tip_pbs()111 bit + pup * BUS_WIDTH_IN_BITS], in ddr3_tip_pbs()224 for (bit = 0; bit < BUS_WIDTH_IN_BITS; bit++) { in ddr3_tip_pbs()230 BUS_WIDTH_IN_BITS], in ddr3_tip_pbs()240 bit = BUS_WIDTH_IN_BITS; in ddr3_tip_pbs()275 bit = BUS_WIDTH_IN_BITS; in ddr3_tip_pbs()383 for (bit = 0; bit < BUS_WIDTH_IN_BITS; bit++) { in ddr3_tip_pbs()385 result_all_bit[bit + pup * BUS_WIDTH_IN_BITS + in ddr3_tip_pbs()[all …]
63 u8 cur_start_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()64 u8 centralization_result[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()65 u8 cur_end_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()66 u8 current_window[BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()68 u8 final_pup_window[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()173 for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS; in ddr3_tip_centralization()226 bit_id < BUS_WIDTH_IN_BITS; in ddr3_tip_centralization()501 u8 cur_start_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_special_rx()502 u8 cur_end_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_special_rx()587 for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS; bit_id++) { in ddr3_tip_special_rx()[all …]
21 u32 phy_reg_bk[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];23 u32 training_res[MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS *163 [MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS * search + in ddr3_tip_get_buf_ptr()164 interface_num * MAX_BUS_NUM * BUS_WIDTH_IN_BITS]; in ddr3_tip_get_buf_ptr()333 mask_dq_num_of_regs = tm->num_of_bus_per_interface * BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training()546 for (i = 0; i < BUS_WIDTH_IN_BITS; i++) { in ddr3_tip_process_result()557 for (i = 0; i < BUS_WIDTH_IN_BITS; i++) { in ddr3_tip_process_result()654 start_reg = pup_cnt * BUS_WIDTH_IN_BITS; in ddr3_tip_read_training_result()655 end_reg = (pup_cnt + 1) * BUS_WIDTH_IN_BITS - 1; in ddr3_tip_read_training_result()658 pup_cnt * BUS_WIDTH_IN_BITS + bit_num; in ddr3_tip_read_training_result()[all …]
50 #define BUS_WIDTH_IN_BITS 8 macro
2492 bit_end = BUS_WIDTH_IN_BITS - 1; in ddr3_tip_is_pup_lock()2514 for (cnt = 0; cnt < BUS_WIDTH_IN_BITS; cnt++) { in ddr3_tip_get_buf_min()2530 for (cnt = 0; cnt < BUS_WIDTH_IN_BITS; cnt++) { in ddr3_tip_get_buf_max()