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/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/mac_ax/mac_8852b/
H A Dgpio_8852b.c23 0x66, BIT(2) | BIT(1) | BIT(0), BIT(2)}
26 0x4F, BIT(5), BIT(5)}
29 0x66, BIT(6), BIT(6)}
32 0x4F, BIT(6), BIT(6)}
35 0x41, BIT(1), BIT(1)}
38 0x41, BIT(2), BIT(2)}
41 0x40, BIT(1) | BIT(0), BIT(0)}
44 0x40, BIT(1) | BIT(0), BIT(1)}
47 0x40, BIT(1) | BIT(0), BIT(1) | BIT(0)}
50 0x142, BIT(0), BIT(0)}
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/mac_ax/mac_8852b/
H A Dgpio_8852b.c23 0x66, BIT(2) | BIT(1) | BIT(0), BIT(2)}
26 0x4F, BIT(5), BIT(5)}
29 0x66, BIT(6), BIT(6)}
32 0x4F, BIT(6), BIT(6)}
35 0x41, BIT(1), BIT(1)}
38 0x41, BIT(2), BIT(2)}
41 0x40, BIT(1) | BIT(0), BIT(0)}
44 0x40, BIT(1) | BIT(0), BIT(1)}
47 0x40, BIT(1) | BIT(0), BIT(1) | BIT(0)}
50 0x142, BIT(0), BIT(0)}
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/include/
H A Dhal_com_reg.h437 #define BIT_PWRBIT_OW_EN BIT(7)
456 #define RXERR_RPT_RST BIT(27)
499 #define BIT_WKFCAM_WE BIT(16)
500 #define BIT_WKFCAM_POLLING_V1 BIT(31)
501 #define BIT_WKFCAM_CLR_V1 BIT(30)
615 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
616 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
617 #define Cmd9346CR_9356SEL BIT(4)
623 #define GPIOSEL_ENBT BIT(5)
644 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/
H A Dhal_com_reg.h437 #define BIT_PWRBIT_OW_EN BIT(7)
456 #define RXERR_RPT_RST BIT(27)
499 #define BIT_WKFCAM_WE BIT(16)
500 #define BIT_WKFCAM_POLLING_V1 BIT(31)
501 #define BIT_WKFCAM_CLR_V1 BIT(30)
615 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
616 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
617 #define Cmd9346CR_9356SEL BIT(4)
623 #define GPIOSEL_ENBT BIT(5)
644 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/include/
H A Dhal_com_reg.h437 #define BIT_PWRBIT_OW_EN BIT(7)
456 #define RXERR_RPT_RST BIT(27)
499 #define BIT_WKFCAM_WE BIT(16)
500 #define BIT_WKFCAM_POLLING_V1 BIT(31)
501 #define BIT_WKFCAM_CLR_V1 BIT(30)
615 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
616 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
617 #define Cmd9346CR_9356SEL BIT(4)
623 #define GPIOSEL_ENBT BIT(5)
644 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/include/
H A Dhal_com_reg.h438 #define BIT_PWRBIT_OW_EN BIT(7)
457 #define RXERR_RPT_RST BIT(27)
500 #define BIT_WKFCAM_WE BIT(16)
501 #define BIT_WKFCAM_POLLING_V1 BIT(31)
502 #define BIT_WKFCAM_CLR_V1 BIT(30)
616 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
617 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
618 #define Cmd9346CR_9356SEL BIT(4)
624 #define GPIOSEL_ENBT BIT(5)
645 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/include/
H A Dhal_com_reg.h437 #define BIT_PWRBIT_OW_EN BIT(7)
456 #define RXERR_RPT_RST BIT(27)
499 #define BIT_WKFCAM_WE BIT(16)
500 #define BIT_WKFCAM_POLLING_V1 BIT(31)
501 #define BIT_WKFCAM_CLR_V1 BIT(30)
615 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
616 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
617 #define Cmd9346CR_9356SEL BIT(4)
623 #define GPIOSEL_ENBT BIT(5)
644 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/include/
H A Dhal_com_reg.h437 #define BIT_PWRBIT_OW_EN BIT(7)
456 #define RXERR_RPT_RST BIT(27)
499 #define BIT_WKFCAM_WE BIT(16)
500 #define BIT_WKFCAM_POLLING_V1 BIT(31)
501 #define BIT_WKFCAM_CLR_V1 BIT(30)
615 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
616 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
617 #define Cmd9346CR_9356SEL BIT(4)
623 #define GPIOSEL_ENBT BIT(5)
644 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/include/
H A Dhal_com_reg.h437 #define BIT_PWRBIT_OW_EN BIT(7)
456 #define RXERR_RPT_RST BIT(27)
499 #define BIT_WKFCAM_WE BIT(16)
500 #define BIT_WKFCAM_POLLING_V1 BIT(31)
501 #define BIT_WKFCAM_CLR_V1 BIT(30)
615 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
616 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
617 #define Cmd9346CR_9356SEL BIT(4)
623 #define GPIOSEL_ENBT BIT(5)
644 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/include/
H A Dhal_com_reg.h438 #define BIT_PWRBIT_OW_EN BIT(7)
457 #define RXERR_RPT_RST BIT(27)
500 #define BIT_WKFCAM_WE BIT(16)
501 #define BIT_WKFCAM_POLLING_V1 BIT(31)
502 #define BIT_WKFCAM_CLR_V1 BIT(30)
616 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
617 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
618 #define Cmd9346CR_9356SEL BIT(4)
624 #define GPIOSEL_ENBT BIT(5)
645 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/
H A Dhal_com_reg.h438 #define BIT_PWRBIT_OW_EN BIT(7)
457 #define RXERR_RPT_RST BIT(27)
500 #define BIT_WKFCAM_WE BIT(16)
501 #define BIT_WKFCAM_POLLING_V1 BIT(31)
502 #define BIT_WKFCAM_CLR_V1 BIT(30)
613 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
614 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
615 #define Cmd9346CR_9356SEL BIT(4)
621 #define GPIOSEL_ENBT BIT(5)
642 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/include/
H A Dhal_com_reg.h436 #define BIT_PWRBIT_OW_EN BIT(7)
455 #define RXERR_RPT_RST BIT(27)
498 #define BIT_WKFCAM_WE BIT(16)
499 #define BIT_WKFCAM_POLLING_V1 BIT(31)
500 #define BIT_WKFCAM_CLR_V1 BIT(30)
611 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
612 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
613 #define Cmd9346CR_9356SEL BIT(4)
619 #define GPIOSEL_ENBT BIT(5)
640 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/include/
H A Dhal_com_reg.h436 #define BIT_PWRBIT_OW_EN BIT(7)
455 #define RXERR_RPT_RST BIT(27)
498 #define BIT_WKFCAM_WE BIT(16)
499 #define BIT_WKFCAM_POLLING_V1 BIT(31)
500 #define BIT_WKFCAM_CLR_V1 BIT(30)
611 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
612 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
613 #define Cmd9346CR_9356SEL BIT(4)
619 #define GPIOSEL_ENBT BIT(5)
640 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/include/
H A Dhal_com_reg.h436 #define BIT_PWRBIT_OW_EN BIT(7)
455 #define RXERR_RPT_RST BIT(27)
498 #define BIT_WKFCAM_WE BIT(16)
499 #define BIT_WKFCAM_POLLING_V1 BIT(31)
500 #define BIT_WKFCAM_CLR_V1 BIT(30)
611 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
612 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
613 #define Cmd9346CR_9356SEL BIT(4)
619 #define GPIOSEL_ENBT BIT(5)
640 #define HSIMR_GPIO12_0_INT_EN BIT(0)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h35 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7)
36 #define BIT_SYS_CTRL1_VSYNCPIN BIT(6)
37 #define BIT_SYS_CTRL1_OTPADROPOVR_SET BIT(5)
38 #define BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD BIT(4)
39 #define BIT_SYS_CTRL1_OTP2XVOVR_EN BIT(3)
40 #define BIT_SYS_CTRL1_OTP2XAOVR_EN BIT(2)
41 #define BIT_SYS_CTRL1_TX_CTRL_HDMI BIT(1)
42 #define BIT_SYS_CTRL1_OTPAMUTEOVR_SET BIT(0)
46 #define BIT_DPD_PWRON_PLL BIT(7)
47 #define BIT_DPD_PDNTX12 BIT(6)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/
H A Dhal_com_reg.h444 #define RXERR_RPT_RST BIT(27)
594 #define CmdEEPROM_En BIT(5) /* EEPROM enable when set 1 */
595 #define CmdEERPOMSEL BIT(4) /* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is …
596 #define Cmd9346CR_9356SEL BIT(4)
602 #define GPIOSEL_ENBT BIT(5)
623 #define HSIMR_GPIO12_0_INT_EN BIT(0)
624 #define HSIMR_SPS_OCP_INT_EN BIT(5)
625 #define HSIMR_RON_INT_EN BIT(6)
626 #define HSIMR_PDN_INT_EN BIT(7)
627 #define HSIMR_GPIO9_INT_EN BIT(25)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/mac/
H A Dmac_reg.h29 #define B_AX_GT0_COUNT_EN BIT(31)
30 #define B_AX_GT0_MODE BIT(30)
31 #define B_AX_GT0_EN BIT(29)
32 #define B_AX_GT0_SORT_EN BIT(28)
41 #define B_AX_GT1_COUNT_EN BIT(31)
42 #define B_AX_GT1_MODE BIT(30)
43 #define B_AX_GT1_EN BIT(29)
44 #define B_AX_GT1_SORT_EN BIT(28)
53 #define B_AX_GT2_COUNT_EN BIT(31)
54 #define B_AX_GT2_MODE BIT(30)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/mac/
H A Dmac_reg.h29 #define B_AX_GT0_COUNT_EN BIT(31)
30 #define B_AX_GT0_MODE BIT(30)
31 #define B_AX_GT0_EN BIT(29)
32 #define B_AX_GT0_SORT_EN BIT(28)
41 #define B_AX_GT1_COUNT_EN BIT(31)
42 #define B_AX_GT1_MODE BIT(30)
43 #define B_AX_GT1_EN BIT(29)
44 #define B_AX_GT1_SORT_EN BIT(28)
53 #define B_AX_GT2_COUNT_EN BIT(31)
54 #define B_AX_GT2_MODE BIT(30)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/dpaa2/
H A Ddpkg.h63 #define NH_FLD_ETH_DA BIT(0)
64 #define NH_FLD_ETH_SA BIT(1)
65 #define NH_FLD_ETH_LENGTH BIT(2)
66 #define NH_FLD_ETH_TYPE BIT(3)
67 #define NH_FLD_ETH_FINAL_CKSUM BIT(4)
68 #define NH_FLD_ETH_PADDING BIT(5)
69 #define NH_FLD_ETH_ALL_FIELDS (BIT(6) - 1)
72 #define NH_FLD_VLAN_VPRI BIT(0)
73 #define NH_FLD_VLAN_CFI BIT(1)
74 #define NH_FLD_VLAN_VID BIT(2)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_regs.h10 #define SYS_ISO_MD2PP BIT(0)
11 #define SYS_ISO_ANALOG_IPS BIT(5)
12 #define SYS_ISO_DIOR BIT(9)
13 #define SYS_ISO_PWC_EV25V BIT(14)
14 #define SYS_ISO_PWC_EV12V BIT(15)
17 #define SYS_FUNC_BBRSTB BIT(0)
18 #define SYS_FUNC_BB_GLB_RSTN BIT(1)
19 #define SYS_FUNC_USBA BIT(2)
20 #define SYS_FUNC_UPLL BIT(3)
21 #define SYS_FUNC_USBD BIT(4)
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8188eu/include/
H A Drtl8188e_spec.h338 #define RXERR_RPT_RST BIT(27)
442 #define CmdEEPROM_En BIT(5)
444 #define CmdEERPOMSEL BIT(4)
445 #define Cmd9346CR_9356SEL BIT(4)
449 #define GPIOSEL_ENBT BIT(5)
463 #define HSIMR_GPIO12_0_INT_EN BIT(0)
464 #define HSIMR_SPS_OCP_INT_EN BIT(5)
465 #define HSIMR_RON_INT_EN BIT(6)
466 #define HSIMR_PDN_INT_EN BIT(7)
467 #define HSIMR_GPIO9_INT_EN BIT(25)
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/sm750fb/
H A Dddk750_reg.h7 #define DE_STATE1_DE_ABORT BIT(0)
10 #define DE_STATE2_DE_FIFO_EMPTY BIT(3)
11 #define DE_STATE2_DE_STATUS_BUSY BIT(2)
12 #define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
20 #define SYSTEM_CTRL_PCI_BURST BIT(29)
21 #define SYSTEM_CTRL_PCI_MASTER BIT(25)
22 #define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
23 #define SYSTEM_CTRL_DE_FIFO_EMPTY BIT(23)
24 #define SYSTEM_CTRL_DE_STATUS_BUSY BIT(22)
25 #define SYSTEM_CTRL_DE_MEM_FIFO_EMPTY BIT(21)
[all …]
/OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h171 #define QCA956X_MAC_CFG1_SOFT_RST BIT(31)
172 #define QCA956X_MAC_CFG1_RX_RST BIT(19)
173 #define QCA956X_MAC_CFG1_TX_RST BIT(18)
174 #define QCA956X_MAC_CFG1_LOOPBACK BIT(8)
175 #define QCA956X_MAC_CFG1_RX_EN BIT(2)
176 #define QCA956X_MAC_CFG1_TX_EN BIT(0)
179 #define QCA956X_MAC_CFG2_IF_1000 BIT(9)
180 #define QCA956X_MAC_CFG2_IF_10_100 BIT(8)
181 #define QCA956X_MAC_CFG2_HUGE_FRAME_EN BIT(5)
182 #define QCA956X_MAC_CFG2_LEN_CHECK BIT(4)
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/emxx_udc/
H A Demxx_udc.h50 #define TEST_FORCE_ENABLE (BIT(18) | BIT(16))
52 #define INT_SEL BIT(10)
53 #define CONSTFS BIT(9)
54 #define SOF_RCV BIT(8)
55 #define RSUM_IN BIT(7)
56 #define SUSPEND BIT(6)
57 #define CONF BIT(5)
58 #define DEFAULT BIT(4)
59 #define CONNECTB BIT(3)
60 #define PUE2 BIT(2)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/mcde/
H A Dmcde_dsi_regs.h8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0)
9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1)
10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2)
11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3)
12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4)
13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5)
14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6)
15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7)
16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8)
17 #define DSI_MCTL_MAIN_DATA_CTL_BTA_EN BIT(9)
[all …]

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