Searched hist:c7f9abcee87f21b078ba707781af45c487b4025b (Results 1 – 4 of 4) sorted by relevance
| /optee_os/core/arch/arm/plat-d06/ |
| H A D | conf.mk | c7f9abcee87f21b078ba707781af45c487b4025b Tue Nov 21 13:20:08 UTC 2023 Xiaoxu Zeng <zengxiaoxu@huawei.com> drivers: implement HiSilicon Queue Management (QM) module
The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.
Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| /optee_os/core/drivers/crypto/ |
| H A D | sub.mk | c7f9abcee87f21b078ba707781af45c487b4025b Tue Nov 21 13:20:08 UTC 2023 Xiaoxu Zeng <zengxiaoxu@huawei.com> drivers: implement HiSilicon Queue Management (QM) module
The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.
Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| /optee_os/core/drivers/crypto/hisilicon/ |
| H A D | hisi_qm.c | c7f9abcee87f21b078ba707781af45c487b4025b Tue Nov 21 13:20:08 UTC 2023 Xiaoxu Zeng <zengxiaoxu@huawei.com> drivers: implement HiSilicon Queue Management (QM) module
The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.
Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
|
| H A D | sub.mk | c7f9abcee87f21b078ba707781af45c487b4025b Tue Nov 21 13:20:08 UTC 2023 Xiaoxu Zeng <zengxiaoxu@huawei.com> drivers: implement HiSilicon Queue Management (QM) module
The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.
Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
|