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/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.cbbc8e053bad16366fc74943ce4c69a910c31b8b8 Tue Feb 02 03:28:03 UTC 2016 Mingkai Hu <mingkai.hu@nxp.com> armv8/ls1043a: Implement workaround for erratum A009660

Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dconfig.hbbc8e053bad16366fc74943ce4c69a910c31b8b8 Tue Feb 02 03:28:03 UTC 2016 Mingkai Hu <mingkai.hu@nxp.com> armv8/ls1043a: Implement workaround for erratum A009660

Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>