Searched hist:b90f207a1d386ec391bd3ea9eb403c4ad7b7551b (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex/ |
| H A D | platform.mk | b90f207a1d386ec391bd3ea9eb403c4ad7b7551b Tue Aug 20 07:33:27 UTC 2019 Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
|
| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | el3_common_macros.S | b90f207a1d386ec391bd3ea9eb403c4ad7b7551b Tue Aug 20 07:33:27 UTC 2019 Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
|
| /rk3399_ARM-atf/make_helpers/ |
| H A D | defaults.mk | b90f207a1d386ec391bd3ea9eb403c4ad7b7551b Tue Aug 20 07:33:27 UTC 2019 Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
|
| /rk3399_ARM-atf/ |
| H A D | Makefile | b90f207a1d386ec391bd3ea9eb403c4ad7b7551b Tue Aug 20 07:33:27 UTC 2019 Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
|