Searched hist:b1bde25ed9b302a2203a928457c91693ed7f91a7 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a720.S | b1bde25ed9b302a2203a928457c91693ed7f91a7 Fri Jul 19 20:59:17 UTC 2024 Arvind Ram Prakash <arvind.ramprakash@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2792132
Cortex-A720 erratum 2792132 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[26] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I8d11fe65a2ab5f79244cc3395d0645f77256304c
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | b1bde25ed9b302a2203a928457c91693ed7f91a7 Fri Jul 19 20:59:17 UTC 2024 Arvind Ram Prakash <arvind.ramprakash@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2792132
Cortex-A720 erratum 2792132 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[26] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I8d11fe65a2ab5f79244cc3395d0645f77256304c
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| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | b1bde25ed9b302a2203a928457c91693ed7f91a7 Fri Jul 19 20:59:17 UTC 2024 Arvind Ram Prakash <arvind.ramprakash@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2792132
Cortex-A720 erratum 2792132 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[26] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I8d11fe65a2ab5f79244cc3395d0645f77256304c
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