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/rk3399_ARM-atf/bl2/
H A Dbl2_private.h7d173fc594d7d50c02e180c56c59ca1d3e51152e Wed Mar 21 07:20:09 UTC 2018 Jiafei Pan <Jiafei.Pan@nxp.com> Add support for BL2 in XIP memory

In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
H A Dbl2_el3.ld.S7d173fc594d7d50c02e180c56c59ca1d3e51152e Wed Mar 21 07:20:09 UTC 2018 Jiafei Pan <Jiafei.Pan@nxp.com> Add support for BL2 in XIP memory

In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
/rk3399_ARM-atf/include/plat/common/
H A Dcommon_def.h7d173fc594d7d50c02e180c56c59ca1d3e51152e Wed Mar 21 07:20:09 UTC 2018 Jiafei Pan <Jiafei.Pan@nxp.com> Add support for BL2 in XIP memory

In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
/rk3399_ARM-atf/docs/
H A Dporting-guide.rst7d173fc594d7d50c02e180c56c59ca1d3e51152e Wed Mar 21 07:20:09 UTC 2018 Jiafei Pan <Jiafei.Pan@nxp.com> Add support for BL2 in XIP memory

In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
/rk3399_ARM-atf/make_helpers/
H A Ddefaults.mk7d173fc594d7d50c02e180c56c59ca1d3e51152e Wed Mar 21 07:20:09 UTC 2018 Jiafei Pan <Jiafei.Pan@nxp.com> Add support for BL2 in XIP memory

In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
/rk3399_ARM-atf/
H A DMakefile7d173fc594d7d50c02e180c56c59ca1d3e51152e Wed Mar 21 07:20:09 UTC 2018 Jiafei Pan <Jiafei.Pan@nxp.com> Add support for BL2 in XIP memory

In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>