Searched hist:"69 b010d3e7db7dbd8b5025540f7ba8c8df89ee7d" (Results 1 – 5 of 5) sorted by relevance
| /optee_os/core/arch/arm/plat-stm32mp1/nsec-service/ |
| H A D | stm32mp1_smc.h | 69b010d3e7db7dbd8b5025540f7ba8c8df89ee7d Tue Apr 14 12:25:21 UTC 2020 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: foundation for SCMI service
Embed a SCMI server in stm32mp1 based on SCMI message drivers.
The platform currently supports only the SCMI Base protocol.
Platform provides 2 Arm SMCCC fastcall communication channels each
using a small shared memory buffer is SYSRAM manage with a SMT header
for SCMI message exchange.
Default disable CFG_CORE_ASLR, CFG_LOCKDEP, CFG_TEE_CORE_DEBUG and
CFG_UNWIND for TEE RAM memory constraints since SCMI server with a
fastcall message processing path consumes several pages of SoC internal
SYSRAM where TEE pager resides.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
|
| H A D | stm32mp1_svc_setup.c | 69b010d3e7db7dbd8b5025540f7ba8c8df89ee7d Tue Apr 14 12:25:21 UTC 2020 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: foundation for SCMI service
Embed a SCMI server in stm32mp1 based on SCMI message drivers.
The platform currently supports only the SCMI Base protocol.
Platform provides 2 Arm SMCCC fastcall communication channels each
using a small shared memory buffer is SYSRAM manage with a SMT header
for SCMI message exchange.
Default disable CFG_CORE_ASLR, CFG_LOCKDEP, CFG_TEE_CORE_DEBUG and
CFG_UNWIND for TEE RAM memory constraints since SCMI server with a
fastcall message processing path consumes several pages of SoC internal
SYSRAM where TEE pager resides.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
|
| /optee_os/core/arch/arm/plat-stm32mp1/ |
| H A D | sub.mk | 69b010d3e7db7dbd8b5025540f7ba8c8df89ee7d Tue Apr 14 12:25:21 UTC 2020 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: foundation for SCMI service
Embed a SCMI server in stm32mp1 based on SCMI message drivers.
The platform currently supports only the SCMI Base protocol.
Platform provides 2 Arm SMCCC fastcall communication channels each
using a small shared memory buffer is SYSRAM manage with a SMT header
for SCMI message exchange.
Default disable CFG_CORE_ASLR, CFG_LOCKDEP, CFG_TEE_CORE_DEBUG and
CFG_UNWIND for TEE RAM memory constraints since SCMI server with a
fastcall message processing path consumes several pages of SoC internal
SYSRAM where TEE pager resides.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
|
| H A D | scmi_server.c | 69b010d3e7db7dbd8b5025540f7ba8c8df89ee7d Tue Apr 14 12:25:21 UTC 2020 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: foundation for SCMI service
Embed a SCMI server in stm32mp1 based on SCMI message drivers.
The platform currently supports only the SCMI Base protocol.
Platform provides 2 Arm SMCCC fastcall communication channels each
using a small shared memory buffer is SYSRAM manage with a SMT header
for SCMI message exchange.
Default disable CFG_CORE_ASLR, CFG_LOCKDEP, CFG_TEE_CORE_DEBUG and
CFG_UNWIND for TEE RAM memory constraints since SCMI server with a
fastcall message processing path consumes several pages of SoC internal
SYSRAM where TEE pager resides.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
|
| H A D | conf.mk | 69b010d3e7db7dbd8b5025540f7ba8c8df89ee7d Tue Apr 14 12:25:21 UTC 2020 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: foundation for SCMI service
Embed a SCMI server in stm32mp1 based on SCMI message drivers.
The platform currently supports only the SCMI Base protocol.
Platform provides 2 Arm SMCCC fastcall communication channels each
using a small shared memory buffer is SYSRAM manage with a SMT header
for SCMI message exchange.
Default disable CFG_CORE_ASLR, CFG_LOCKDEP, CFG_TEE_CORE_DEBUG and
CFG_UNWIND for TEE RAM memory constraints since SCMI server with a
fastcall message processing path consumes several pages of SoC internal
SYSRAM where TEE pager resides.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
|