Searched hist:"67337 e68a5a88ecbe4ae0df6a91c653f2817c3e1" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-sunxi/dram_timings/ |
| H A D | ddr2_v3s.c | 67337e68a5a88ecbe4ae0df6a91c653f2817c3e1 Sat Jun 03 09:10:20 UTC 2017 Icenowy Zheng <icenowy@aosc.xyz> sunxi: add support for the DDR2 in V3s SoC
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
|
| H A D | Makefile | 67337e68a5a88ecbe4ae0df6a91c653f2817c3e1 Sat Jun 03 09:10:20 UTC 2017 Icenowy Zheng <icenowy@aosc.xyz> sunxi: add support for the DDR2 in V3s SoC
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
|
| /rk3399_rockchip-uboot/arch/arm/mach-sunxi/ |
| H A D | dram_sunxi_dw.c | 67337e68a5a88ecbe4ae0df6a91c653f2817c3e1 Sat Jun 03 09:10:20 UTC 2017 Icenowy Zheng <icenowy@aosc.xyz> sunxi: add support for the DDR2 in V3s SoC
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
|
| H A D | Kconfig | 67337e68a5a88ecbe4ae0df6a91c653f2817c3e1 Sat Jun 03 09:10:20 UTC 2017 Icenowy Zheng <icenowy@aosc.xyz> sunxi: add support for the DDR2 in V3s SoC
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
|