Searched hist:"5 cc8c7ba1b24ace2ef7345e96d933141f3609817" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a76.h | 5cc8c7ba1b24ace2ef7345e96d933141f3609817 Mon Feb 25 11:37:38 UTC 2019 Louis Mayencourt <louis.mayencourt@arm.com> Add workaround for errata 1220197 for Cortex-A76
Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.
Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a76.S | 5cc8c7ba1b24ace2ef7345e96d933141f3609817 Mon Feb 25 11:37:38 UTC 2019 Louis Mayencourt <louis.mayencourt@arm.com> Add workaround for errata 1220197 for Cortex-A76
Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.
Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 5cc8c7ba1b24ace2ef7345e96d933141f3609817 Mon Feb 25 11:37:38 UTC 2019 Louis Mayencourt <louis.mayencourt@arm.com> Add workaround for errata 1220197 for Cortex-A76
Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.
Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
|