Searched hist:"4 f6036834fb7f53e3002c37af1c9d0681e8ef675" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/bl1/aarch64/ |
| H A D | bl1_arch_setup.c | 4f6036834fb7f53e3002c37af1c9d0681e8ef675 Tue Jan 14 18:11:48 UTC 2014 Harry Liebel <Harry.Liebel@arm.com> Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.
Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.
Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
|
| H A D | bl1_entrypoint.S | 4f6036834fb7f53e3002c37af1c9d0681e8ef675 Tue Jan 14 18:11:48 UTC 2014 Harry Liebel <Harry.Liebel@arm.com> Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.
Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.
Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
|
| /rk3399_ARM-atf/docs/ |
| H A D | change-log.md | 4f6036834fb7f53e3002c37af1c9d0681e8ef675 Tue Jan 14 18:11:48 UTC 2014 Harry Liebel <Harry.Liebel@arm.com> Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.
Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.
Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
|
| /rk3399_ARM-atf/bl31/aarch64/ |
| H A D | bl31_entrypoint.S | 4f6036834fb7f53e3002c37af1c9d0681e8ef675 Tue Jan 14 18:11:48 UTC 2014 Harry Liebel <Harry.Liebel@arm.com> Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.
Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.
Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
|
| /rk3399_ARM-atf/ |
| H A D | Makefile | 4f6036834fb7f53e3002c37af1c9d0681e8ef675 Tue Jan 14 18:11:48 UTC 2014 Harry Liebel <Harry.Liebel@arm.com> Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.
Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.
Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
|