Searched hist:"47 d6f5ff16d1f2ad009d630a381054b10fa0a06f" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a78_ae.h | 47d6f5ff16d1f2ad009d630a381054b10fa0a06f Tue Jul 27 09:32:29 UTC 2021 Varun Wadekar <vwadekar@nvidia.com> feat(cpus): workaround for Cortex A78 AE erratum 1941500
Cortex A78 AE erratum 1941500 is a Cat B erratum that applies
to revisions <= r0p1. It is still open.
This erratum is avoided by by setting CPUECTLR_EL1[8] to 1.
There is a small performance cost (<0.5%) for setting this
bit.
SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900
Change-Id: I2d72666468b146714a0340ba114ccf0f5165b39c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a78_ae.S | 47d6f5ff16d1f2ad009d630a381054b10fa0a06f Tue Jul 27 09:32:29 UTC 2021 Varun Wadekar <vwadekar@nvidia.com> feat(cpus): workaround for Cortex A78 AE erratum 1941500
Cortex A78 AE erratum 1941500 is a Cat B erratum that applies
to revisions <= r0p1. It is still open.
This erratum is avoided by by setting CPUECTLR_EL1[8] to 1.
There is a small performance cost (<0.5%) for setting this
bit.
SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900
Change-Id: I2d72666468b146714a0340ba114ccf0f5165b39c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 47d6f5ff16d1f2ad009d630a381054b10fa0a06f Tue Jul 27 09:32:29 UTC 2021 Varun Wadekar <vwadekar@nvidia.com> feat(cpus): workaround for Cortex A78 AE erratum 1941500
Cortex A78 AE erratum 1941500 is a Cat B erratum that applies
to revisions <= r0p1. It is still open.
This erratum is avoided by by setting CPUECTLR_EL1[8] to 1.
There is a small performance cost (<0.5%) for setting this
bit.
SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900
Change-Id: I2d72666468b146714a0340ba114ccf0f5165b39c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 47d6f5ff16d1f2ad009d630a381054b10fa0a06f Tue Jul 27 09:32:29 UTC 2021 Varun Wadekar <vwadekar@nvidia.com> feat(cpus): workaround for Cortex A78 AE erratum 1941500
Cortex A78 AE erratum 1941500 is a Cat B erratum that applies
to revisions <= r0p1. It is still open.
This erratum is avoided by by setting CPUECTLR_EL1[8] to 1.
There is a small performance cost (<0.5%) for setting this
bit.
SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900
Change-Id: I2d72666468b146714a0340ba114ccf0f5165b39c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|