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/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dcortex_x4.h1e4480bb54b0f567688cfbea2119aa703fcbb7b8 Tue Jul 16 19:34:42 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory tagging is enabled.

The workaround is to set CPUACTLR5_EL1[14] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Change-Id: I546044bde6e5eedd0abf61643d25e2dd2036df5c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcortex_x4.S1e4480bb54b0f567688cfbea2119aa703fcbb7b8 Tue Jul 16 19:34:42 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory tagging is enabled.

The workaround is to set CPUACTLR5_EL1[14] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Change-Id: I546044bde6e5eedd0abf61643d25e2dd2036df5c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst1e4480bb54b0f567688cfbea2119aa703fcbb7b8 Tue Jul 16 19:34:42 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory tagging is enabled.

The workaround is to set CPUACTLR5_EL1[14] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Change-Id: I546044bde6e5eedd0abf61643d25e2dd2036df5c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk1e4480bb54b0f567688cfbea2119aa703fcbb7b8 Tue Jul 16 19:34:42 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory tagging is enabled.

The workaround is to set CPUACTLR5_EL1[14] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Change-Id: I546044bde6e5eedd0abf61643d25e2dd2036df5c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>