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/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c1a87c24fe8f4c8afc735aa50b8fc9eaa2f230c0f Fri Aug 26 10:30:38 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> armv8: fsl-layerscape: Update ddr erratum a008336

DDR erratum A008336 only applies to DDR controller v5.2.0.
DDR controller v5.2.1 already has default 0x43b30002 in
EDDRTQCR1 register for optimal performance.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>