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| /rk3399_ARM-atf/fdts/ |
| H A D | tc-fvp.dtsi | 1300bbce15308868fefda1be9ee7b4fccedde951 Tue Apr 23 11:06:47 UTC 2024 Jagdish Gediya <jagdish.gediya@arm.com> feat(tc): change GIC DT property 'interrupt-cells' to 4
Change the GIC's DT property 'interrupt-cells' to 4, so the 4th cell is
a phandle to a node describing a set of CPUs this interrupt is affine
to.
If an interrupt is a PPI, and the node pointed in the 4th cell must be a
subnode of the "ppi-partitions" in the GIC node. For interrupt types
other than PPI, this cell must be zero. This is a preparison for
sequential changes for interrupt partitions, as the first step, it sets
all zeros for the interrupt affinity.
Change-Id: I66490a86a27aad5db6b1a42c2d8e0d042eee46a9
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
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| H A D | tc-base.dtsi | 1300bbce15308868fefda1be9ee7b4fccedde951 Tue Apr 23 11:06:47 UTC 2024 Jagdish Gediya <jagdish.gediya@arm.com> feat(tc): change GIC DT property 'interrupt-cells' to 4
Change the GIC's DT property 'interrupt-cells' to 4, so the 4th cell is
a phandle to a node describing a set of CPUs this interrupt is affine
to.
If an interrupt is a PPI, and the node pointed in the 4th cell must be a
subnode of the "ppi-partitions" in the GIC node. For interrupt types
other than PPI, this cell must be zero. This is a preparison for
sequential changes for interrupt partitions, as the first step, it sets
all zeros for the interrupt affinity.
Change-Id: I66490a86a27aad5db6b1a42c2d8e0d042eee46a9
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
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