Searched hist:"0 c8d4fef28768233f1f46b4d085f904293dffd2c" (Results 1 – 8 of 8) sorted by relevance
| /rk3399_ARM-atf/bl32/tsp/aarch64/ |
| H A D | tsp_exceptions.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| H A D | tsp_entrypoint.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| /rk3399_ARM-atf/bl1/aarch64/ |
| H A D | bl1_arch_setup.c | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| H A D | bl1_entrypoint.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| H A D | bl1_exceptions.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| /rk3399_ARM-atf/bl2/aarch64/ |
| H A D | bl2_entrypoint.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| /rk3399_ARM-atf/bl31/aarch64/ |
| H A D | bl31_entrypoint.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|
| H A D | runtime_exceptions.S | 0c8d4fef28768233f1f46b4d085f904293dffd2c Mon Aug 04 22:13:10 UTC 2014 Achin Gupta <achin.gupta@arm.com> Unmask SError interrupt and clear SCR_EL3.EA bit
This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.
The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.
Fixes ARM-software/tf-issues#153
Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
|