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/rk3399_rockchip-uboot/doc/
H A DREADME.xtensa1 U-Boot for the Xtensa Architecture
4 Xtensa Architecture and Diamond Cores
7 Xtensa is a configurable processor architecture from Tensilica, Inc.
11 Xtensa licensees create their own Xtensa cores with selected features
13 is configured with Tensilica tools and built with Tensilica's Xtensa
16 There are an effectively infinite number of CPUs in the Xtensa
18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an
22 individual Xtensa core configuration using a set of macros provided with
33 a variant-specific directory located in the arch/xtensa/include/asm
[all …]
/rk3399_rockchip-uboot/arch/xtensa/
H A DKconfig1 menu "Xtensa architecture"
2 depends on XTENSA
6 default "xtensa"
9 string "Xtensa Core Variant"
H A DMakefile5 head-y := arch/xtensa/cpu/start.o
7 libs-y += arch/xtensa/cpu/
8 libs-y += arch/xtensa/lib/
H A Dconfig.mk8 CROSS_COMPILE ?= xtensa-linux-
/rk3399_rockchip-uboot/arch/xtensa/lib/
H A Dtime.c32 #warning "Without Xtensa timer option, timing will not be accurate." in delay_cycles()
94 * On Xtensa it just returns the timer value.
103 * On Xtensa it returns the number of timer ticks per second.
H A Dcache.c13 * Xtensa version D or later will support changing cache behavior, so
/rk3399_rockchip-uboot/arch/
H A DKconfig128 config XTENSA config in Architecture select
129 bool "Xtensa architecture"
202 source "arch/xtensa/Kconfig"
/rk3399_rockchip-uboot/arch/xtensa/cpu/
H A Du-boot.lds14 OUTPUT_ARCH(xtensa)
26 * initial stack. Not all Xtensa processor configurations support that, so
92 * On many Xtensa boards a region of RAM may be mapped to the ROM address
H A Dcpu.c38 sprintf(buf, "CPU: Xtensa %s (id: %08x:%08x) at %s MHz\n", in print_cpuinfo()
/rk3399_rockchip-uboot/arch/xtensa/dts/
H A Dxtfpga.dtsi2 compatible = "cdns,xtensa-xtfpga";
20 compatible = "cdns,xtensa-cpu";
29 compatible = "cdns,xtensa-pic";
H A Dkc705.dts6 compatible = "cdns,xtensa-kc705";
H A Dml605.dts6 compatible = "cdns,xtensa-ml605";
H A Dkc705_nommu.dts6 compatible = "cdns,xtensa-kc705";
H A Dml605_nommu.dts6 compatible = "cdns,xtensa-ml605";
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-dc232b/
H A Dtie.h2 * This header file describes this specific Xtensa processor's TIE extensions
3 * that extend basic Xtensa core functionality. It is customized to this
4 * Xtensa processor configuration.
69 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
H A Dtie-asm.h3 * macros, etc.) for this specific Xtensa processor's TIE extensions
4 * and options. It is customized to this Xtensa processor configuration.
H A Dcore.h2 * Xtensa processor core configuration information.
88 (CoreID) set in the Xtensa
162 /* Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits): */
291 * These macros describe how Xtensa processor interrupt numbers
295 * See the Xtensa processor databook for more details.
322 #define XCHAL_XEA_VERSION 2 /* Xtensa Exception Architecture
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-dc233c/
H A Dtie.h2 * This header file describes this specific Xtensa processor's TIE extensions
3 * that extend basic Xtensa core functionality. It is customized to this
4 * Xtensa processor configuration.
69 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
/rk3399_rockchip-uboot/arch/xtensa/include/asm/
H A Dbyteorder.h2 * Based on Linux/Xtensa kernel version
18 /* instruction sequence from Xtensa ISA release 2/2000 */ in ___arch__swab32()
H A Dmisc.h17 /* Used in cpu/xtensa/cpu.c */
H A Dbootparam.h2 * Definition of the Linux/Xtensa boot parameter structure
H A Dio.h5 * Based on the Linux/Xtensa version of this header.
87 /* At this point the Xtensa doesn't provide byte swap instructions */
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-de212/
H A Dtie.h2 * This header file describes this specific Xtensa processor's TIE extensions
3 * that extend basic Xtensa core functionality. It is customized to this
4 * Xtensa processor configuration.
46 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
/rk3399_rockchip-uboot/
H A D.travis.yml73 - if [[ "${TOOLCHAIN}" == *xtensa* ]]; then ./tools/buildman/buildman --fetch-arch xtensa ; fi
248 - BUILDMAN="xtensa"
249 TOOLCHAIN="xtensa"
/rk3399_rockchip-uboot/board/cadence/xtfpga/
H A DREADME16 - An Xtensa or Diamond processor core.
65 tool such as the Xtensa OCD Daemon connected via a suppored probe.

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