Searched +full:tx +full:- +full:termination +full:- +full:fix (Results 1 – 25 of 74) sorted by relevance
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1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/xlnx,zynqmp-psgtr.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>18 "#phy-cells":23 - description: The GTR lane26 - description: The PHY type28 - PHY_TYPE_DP29 - PHY_TYPE_PCIE[all …]
2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>44 * ath5k_hw_start_rx_dma() - Start DMA receive55 * ath5k_hw_stop_rx_dma() - Stop DMA receive70 i--) in ath5k_hw_stop_rx_dma()77 return i ? 0 : -EBUSY; in ath5k_hw_stop_rx_dma()81 * ath5k_hw_get_rxdp() - Get RX Descriptor's address91 * ath5k_hw_set_rxdp() - Set RX Descriptor's address95 * Returns -EIO if rx is active103 return -EIO; in ath5k_hw_set_rxdp()[all …]
2 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>3 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>4 * Copyright (c) 2007-2008 Michael Taylor <mike.taylor@apprion.com>28 * 5210 - http://nova.stanford.edu/~bbaas/ps/isscc2002_slides.pdf30 * 5211 - http://www.hotchips.org/archives/hc14/3_Tue/16_mcfarland.pdf33 * Atheros's ART program (Atheros Radio Test), on ath9k, on legacy-hal42 * AR5210-Specific TXDP registers46 #define AR5K_NOQCU_TXDP0 0x0000 /* Queue 0 - data */47 #define AR5K_NOQCU_TXDP1 0x0004 /* Queue 1 - beacons */53 #define AR5K_CR_TXE0 0x00000001 /* TX Enable for queue 0 on 5210 */[all …]
1 // SPDX-License-Identifier: GPL-2.03 * phy-zynqmp.c - PHY driver for Xilinx ZynqMP GT.5 * Copyright (C) 2018-2020 Xilinx Inc.26 #include <dt-bindings/phy/phy.h>32 /* TX De-emphasis parameters */171 * struct xpsgtr_ssc - structure to hold SSC settings for a lane185 * struct xpsgtr_phy - representation of a lane205 * struct xpsgtr_dev - representation of a ZynMP GT device212 * @tx_term_fix: fix for GT issue255 return readl(gtr_dev->serdes + reg); in xpsgtr_read()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only51 /* the maximum queue length for tx in packets. 0 is no limit */80 const int oldstate = sk->sk_state; in dccp_set_state()82 dccp_pr_debug("%s(%p) %s --> %s\n", dccp_role(sk), sk, in dccp_set_state()92 dccp_feat_list_purge(&dccp_sk(sk)->dccps_featneg); in dccp_set_state()100 sk->sk_prot->unhash(sk); in dccp_set_state()101 if (inet_csk(sk)->icsk_bind_hash != NULL && in dccp_set_state()102 !(sk->sk_userlocks & SOCK_BINDPORT_LOCK)) in dccp_set_state()120 switch (sk->sk_state) { in dccp_finish_passive_close()141 sk->sk_shutdown = SHUTDOWN_MASK; in dccp_done()[all …]
3 A PCMCIA ethernet driver for NS8390-based cards5 This driver supports the D-Link DE-650 and Linksys EthernetCard6 cards, the newer D-Link and Linksys combo cards, Accton EN22127 cards, the RPTI EP400, and the PreMax PE-200 in non-shared-memory9 Conrad ethernet card, and the Kingston KNE-PCM/x in shared-memory12 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net26 CCAE support. Drivers merged back together, and shared-memory55 #define PCNET_DATAPORT 0x10 /* NatSemi-defined port window offset. */59 #define PCNET_START_PG 0x40 /* First page of TX buffer */66 #define PCNET_RDC_TIMEOUT (2*HZ/100) /* Max wait in jiffies for Tx RDC */[all …]
20 /*---------------------------------------------------------------------------32 All values are in the range 0..255 (ie they are 8-bit values)33 ---------------------------------------------------------------------------*/91 /* How many frames until we start a-mpdu TX session */99 /* Init/De-Init */269 /* Tx Complete Indication */317 * This is temp fix. Should be removed once Host and Riva code is436 /* 20/40MHZ offset-HIGH 40/80MHZ offset HIGH */491 /* Added for BT-AMP support */494 /* Added for BT-AMP support */[all …]
6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>13 * Copyright 2015-2017 Intel Deutschland GmbH14 * Copyright (C) 2018-2020 Intel Corporation32 * be careful not to break things - i.e. don't move anything around or so74 * - a setup station entry is added, not yet authorized, without any rate76 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid79 * - %NL80211_TDLS_ENABLE_LINK is then used80 * - after this, the only valid operation is to remove it by tearing down95 * Frame registration is done on a per-interface basis and registrations137 * software, like the AP-VLAN type in mac80211 for example, there's[all …]
6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>13 * Copyright 2015-2017 Intel Deutschland GmbH32 * be careful not to break things - i.e. don't move anything around or so69 * - a setup station entry is added, not yet authorized, without any rate71 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid74 * - %NL80211_TDLS_ENABLE_LINK is then used75 * - after this, the only valid operation is to remove it by tearing down90 * Frame registration is done on a per-interface basis and registrations132 * software, like the AP-VLAN type in mac80211 for example, there's134 * are only restricted by some semantic restrictions (e.g. AP-VLAN[all …]
1 /* SPDX-License-Identifier: GPL-2.0-only */3 * mac80211 <-> driver interface5 * Copyright 2002-2005, Devicescape Software, Inc.6 * Copyright 2006-2007 Jiri Benc <jbenc@suse.cz>7 * Copyright 2007-2010 Johannes Berg <johannes@sipsolutions.net>8 * Copyright 2013-2014 Intel Mobile Communications GmbH9 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH10 * Copyright (C) 2018 - 2020 Intel Corporation31 * only partial functionality in hard- or firmware. This document32 * defines the interface between mac80211 and low-level hardware[all …]
1 /* SPDX-License-Identifier: GPL-2.0-only */7 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>8 * Copyright 2013-2014 Intel Mobile Communications GmbH9 * Copyright 2015-2017 Intel Deutschland GmbH10 * Copyright (C) 2018-2020 Intel Corporation70 * enum ieee80211_channel_flags - channel flags141 * struct ieee80211_channel - channel definition148 * @hw_value: hardware-specific value for the channel184 * enum ieee80211_rate_flags - rate flags217 * enum ieee80211_bss_type - BSS type filter[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 * of the original driver such as link fail-over and link management because19 #include <linux/dma-mapping.h>54 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)70 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))77 static int debug = -1; /* defaults above */85 static int disable_msi = -1;94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */96 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */[all …]
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.16 * - Redistributions of source code must retain the above20 * - Redistributions in binary form must reproduce the above40 #include <linux/dma-mapping.h>68 # define FL_PG_ORDER (16 - PAGE_SHIFT)82 * Max number of Tx descriptors we clean up at a time. Should be modest as103 * Period of the Tx queue check timer.108 * Max number of Tx descriptors to be reclaimed by the Tx timer.115 #define NOMEM_TMR_IDX (SGE_NTIMERS - 1)118 * Suspension threshold for non-Ethernet Tx queues. We require enough room[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Shared Memory Communications over RDMA (SMC-R) and RoCE57 if (lgr->is_smcd) { in smc_lgr_list_head()58 *lgr_lock = &lgr->smcd->lgr_lock; in smc_lgr_list_head()59 return &lgr->smcd->lgr_list; in smc_lgr_list_head()70 * otherwise there is a risk of out-of-sync link groups. in smc_lgr_schedule_free_work()72 if (!lgr->freeing) { in smc_lgr_schedule_free_work()73 mod_delayed_work(system_wq, &lgr->free_work, in smc_lgr_schedule_free_work()74 (!lgr->is_smcd && lgr->role == SMC_CLNT) ? in smc_lgr_schedule_free_work()89 u32 token = conn->alert_token_local; in smc_lgr_add_alert_token()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * hfcmulti.c low level driver for hfc-4s/hfc-8s/hfc-e1 based cards7 * Peter Sprenger (sprengermoving-bytes.de)9 * inspired by existing hfc-pci driver:10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)22 * Bit 0-7 = 0x00001 = HFC-E1 (1 port)23 * or Bit 0-7 = 0x00004 = HFC-4S (4 ports)24 * or Bit 0-7 = 0x00008 = HFC-8S (8 ports)26 * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware38 * example: 0x20204 one HFC-4S with dtmf detection and 128 timeslots on PCM[all …]
2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.60 /*------------------------------------------------------------------------------62 ------------------------------------------------------------------------------*/69 * \retval -EIO Initialization failed.77 * \retval 0 Termination successful.78 * \retval -EIO Termination failed.98 * \retval -EIO Failure.99 * \retval -EINVAL Parameter 'wcount' is not zero but parameter133 #define TUNER_MODE_SUB0 0x0001 /* for sub-mode (e.g. RF-AGC setting) */134 #define TUNER_MODE_SUB1 0x0002 /* for sub-mode (e.g. RF-AGC setting) */[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/21 #include <linux/soc/ti/ti-msgmgr.h>33 * struct ti_sci_xfer - Structure representing a message flow37 * Since we work with request-ACK protocol, we can39 * use for the tx path.50 * struct ti_sci_xfers_info - Structure to manage transfer information68 * struct ti_sci_desc - Description of SoC integration83 * struct ti_sci_info - Structure representing a TI SCI instance127 * ti_sci_debug_show() - Helper to dump the debug log[all …]
21 * <<Broadcom-WL-IPTag/Dual:>>107 * Bridge-Tunnel: 0x00 0x00 0xF8181 #define DOT11_CS_END_LEN 16 /* d11 CF-END frame length */184 * RWL wifi protocol: The Vendor Specific Action frame is defined for vendor-specific signaling337 /* These lengths assume 64 MU groups, as specified in 802.11ac-2013 */383 * Extension Channel Offset IE: 802.11n-D1.0 spec. added sideband443 /* CSA mode - 802.11h-2003 $7.3.2.20 */583 #define DOT11_TPE_MAX_TX_PWR_EIRP_MIN -128 /* 0.5 db step */587 #define DOT11_TPE_MAX_TX_PWR_PSD_BLOCKED -128651 #define DOT11_TDLS_CAP_PU_BUFFER_STA 28 /* TDLS Peer U-APSD buffer STA support */[all …]
3 * Copyright(c) 2007 - 2019 Realtek Corporation.28 /*----------------------------------------------------------30 -----------------------------------------------------------*/51 /*----------------------------------------------------------53 -----------------------------------------------------------*/133 { -1, 0, 0, 0, 0, BW20 } in init_channel_list()145 for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { in init_channel_list()146 if (rtw_chset_search_ch(channel_set, ch) == -1) in init_channel_list()149 if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8)) in init_channel_list()153 ((o->bw == BW40MINUS) || (o->bw == BW40PLUS))) in init_channel_list()[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */4 * Copyright(c) 2007 - 2019 Realtek Corporation.33 /*----------------------------------------------------------35 -----------------------------------------------------------*/56 /*----------------------------------------------------------58 -----------------------------------------------------------*/137 { -1, 0, 0, 0, 0, BW20 } in init_channel_list()149 for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { in init_channel_list()150 if (rtw_chset_search_ch(channel_set, ch) == -1) in init_channel_list()153 if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8)) in init_channel_list()[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */4 * Copyright(c) 2007 - 2019 Realtek Corporation.33 /*----------------------------------------------------------35 -----------------------------------------------------------*/56 /*----------------------------------------------------------58 -----------------------------------------------------------*/138 { -1, 0, 0, 0, 0, BW20 } in init_channel_list()150 for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { in init_channel_list()151 if (rtw_chset_search_ch(channel_set, ch) == -1) in init_channel_list()154 if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8)) in init_channel_list()[all …]
... 502 [QUEUE_MANAGER] %p failed to set non-blocking mode on pipe descriptors mali-cinstr-timer