| /rk3399_rockchip-uboot/arch/powerpc/ |
| H A D | Kconfig | 18 config MPC85xx config in PowerPC architecture""CPU select
19 bool "MPC85xx"
40 source "arch/powerpc/cpu/mpc85xx/Kconfig"
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| H A D | Makefile | 6 head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
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| /rk3399_rockchip-uboot/doc/SPL/ |
| H A D | README.spl-secure-boot | 1 Overview of SPL verified boot on powerpc/mpc85xx & arm/layerscape platforms
8 mpc85xx & arm/layerscape platforms.
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.TPL | 9 Due to the SPL on some boards(powerpc mpc85xx) has a size limit and cannot
13 execution. Now, only the powerpc mpc85xx has this requirement and will
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| H A D | README.scrapyard | 22 stxgp3 powerpc mpc85xx 2ec69b88 2015-09-02 Dan Malek <dan@embeddedalley.co…
23 stxssa powerpc mpc85xx 2ec69b88 2015-09-02 Dan Malek <dan@embeddedalley.co…
101 T4240EMU powerpc mpc85xx 7fc63cca 2015-05-05 York Sun <yorksun@freescale.com>
115 P2020DS powerpc mpc85xx 168dcc6c 2015-01-23
116 P2020COME powerpc mpc85xx 89123536 2015-01-23 Ira W. Snyder <iws@ovro.caltech…
117 P2020RDB powerpc mpc85xx 743d4815 2015-01-23 Poonam Aggrwal <poonam.aggrwal@…
118 P2010RDB powerpc mpc85xx 743d4815 2015-01-23
119 P1020RDB powerpc mpc85xx 743d4815 2015-01-23
120 P1011RDB powerpc mpc85xx 743d4815 2015-01-23
199 HWW1U1A powerpc mpc85xx 4109cb0 2014-10-27 Kyle Moffett <Kyle.D.Moffett@bo…
[all …]
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| H A D | README.Heterogeneous-SoCs | 4 powerpc/mpc85xx code ve APIs and function to get the number,
17 - arch/powerpc/cpu/mpc85xx/cpu.c
22 - arch/powerpc/cpu/mpc85xx/speed.c
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| H A D | README.mpc85xx | 4 Freescale's e500v1 and e500v2 cores (used in mpc85xx chips) have some
23 Please refer README section "MPC85xx External Debug Support"
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| H A D | README.mpc85xxcds | 17 The Binutils in current ELDK toolchain will not support MPC85xx
31 configured for MPC85xx CDS has been updated to reflect the new memory
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | u-boot.lds | 89 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
95 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
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| H A D | Kconfig | 1 menu "mpc85xx CPU"
2 depends on MPC85xx
5 default "mpc85xx"
9 depends on MPC85xx
1160 int "Maximum number of CPUs permitted for MPC85xx"
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| H A D | u-boot-nand.lds | 81 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
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| H A D | u-boot-spl.lds | 83 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
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| H A D | interrupts.c | 8 * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/ |
| H A D | fdt.c | 4 * Code copied & edited from Freescale mpc85xx stuff.
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| /rk3399_rockchip-uboot/drivers/gpio/ |
| H A D | Kconfig | 299 bool "Freescale MPC85XX GPIO driver"
302 This driver supports the built-in GPIO controller of MPC85XX CPUs.
321 The driver has been tested on MPC85XX, but it is likely that other
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| /rk3399_rockchip-uboot/board/freescale/c29xpcie/ |
| H A D | spl_minimal.c | 7 #include <mpc85xx.h>
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| /rk3399_rockchip-uboot/board/freescale/p1010rdb/ |
| H A D | spl_minimal.c | 7 #include <mpc85xx.h>
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| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | Kconfig | 5 PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM-
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| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | mpc85xx_gpio.h | 13 * The following internal functions are an MPC85XX-specific GPIO API which
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| H A D | ppc.h | 24 #include <mpc85xx.h>
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| /rk3399_rockchip-uboot/include/configs/ |
| H A D | P1010RDB.h | 30 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
55 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
79 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
108 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
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| H A D | P1022DS.h | 27 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
47 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
85 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
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| H A D | MPC8540ADS.h | 12 * Please refer to doc/README.mpc85xx for more info.
37 * sysclk for MPC85xx
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/ |
| H A D | interrupts.c | 8 * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
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| H A D | mp.c | 22 * as exists on MPC85xx w/its PIC having a timing window in cpu_reset()
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