Searched full:aarch64 (Results 1 – 25 of 38) sorted by relevance
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6 * Support for Thread-Local Storage (TLS) ABIs for ARMv7/Aarch32 and Aarch64.12 * (arm-linux-gnueabihf-* and aarch64-linux-gnu-*). This allows building C++ TAs17 * - "TLS data structures variant 1" (section 3): the AArch64 compiler uses the28 * g++ Aarch64 exception handling and it does use the TCB to provide TLS156 * Aarch64 ABI requirement: the thread pointer shall point to the in __utee_tcb_init()
7 ifeq ($(clang-target),aarch64-linux)8 clang-target := aarch64-linux-gnu
22 # Don't cross-compile if building on aarch64 natively23 ifneq ($(shell uname -m),aarch64)24 CROSS_COMPILE64 ?= aarch64-linux-gnu-
11 * Refer to "Semihosting for Aarch32 and Aarch64":
49 * and to transform them into Aarch64 arguments.92 * Convert remaining Aarch32 parameters passed on stack as Aarch64
192 /* Check aarch64 specific instructions */ in check_crypto_extensions()1399 * a0 - DTB address or 0 (AArch64) in boot_save_args()1401 * a1 - 1 << 32 | TRANSFER_LIST_SIGNATURE[0:31] (AArch64) in boot_save_args()1403 * a2 - must be 0 (AArch64) in boot_save_args()
214 /* Set up frame pointer as per the Aarch64 AAPCS */ in init_regs()660 * Spectre-BHB has only been analyzed for AArch64 so far. For in select_vector_wa_spectre_bhb()971 regs->sp = user_sp; /* Used when running TA in Aarch64 */ in set_ctx_regs()
335 * Lower EL using AArch64 : 0x400 - 0x580457 * Lower EL using AArch64 : 0x400 - 0x580573 * Lower EL using AArch64 : 0x400 - 0x580
17 gcc-aarch64-linux-gnu \
21 execution-state = <0>; /* AARCH64 */
35 * Advanced SIMD/floating point state on ARMv8-A AArch64 has:
14 * full 64 bit values in the argument registers if invoked from Aarch64
339 * Define the constraint used for read-only pointer operands to aarch64 asm.346 * aarch64 assembly, it is necessary to use something like:362 #error "Unrecognised pointer size for aarch64"
2 * Armv8-A Cryptographic Extension support functions for Aarch6455 # error "Minimum version of Clang for MBEDTLS_AESCE_C on aarch64 is 4.0."75 # error "Minimum version of armclang for MBEDTLS_AESCE_C on aarch64 is 6.6."
13 OUTPUT_ARCH(aarch64)
39 EMSG_RAW(" arch: %s", elf->is_32bit ? "arm" : "aarch64"); in dump_ta_state()
23 * Set to 1 for both AArch64 and AArch32 according to fw handoff spec v0.9
178 * @is_32bit: True if TA should execute in Aarch32, false if Aarch64
14 /* This is for AArch64 only, MTE is only available in this mode */
8 OUTPUT_ARCH(aarch64)
370 export CROSS_COMPILE64="ccache aarch64-linux-gnu-"506 # The BTI-enabled toolchain is aarch64-unknown-linux-uclibc-gcc in /usr/local/bin508 export AARCH64_CROSS_COMPILE=aarch64-unknown-linux-uclibc-
38 CFG_KERN_LINKER_ARCH ?= aarch6458 # AArch64 has no fallback to soft-float
169 if b'ARM aarch64,' in output[0]:170 self._arch = 'aarch64-linux-gnu-'
120 # of 64-bit values (Aarch64: PMULL/PMULL2 with the 1Q specifier; Aarch32:
956 * in AArch64 state or in monitor mode in AArch32 state. in gic_native_itr_handler()960 * in AArch64 state or in monitor mode in AArch32 state. in gic_native_itr_handler()