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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/rng/
H A Dsilex-insight,ba431-rng.yaml33 reg = <0x42800000 0x1000>;
/OK3568_Linux_fs/kernel/arch/m68k/fpsp040/
H A Dstwotox.S31 | N = 64(M + M') + j, j = 0,1,2,...,63.
44 | N = 64(M + M') + j, j = 0,1,2,...,63.
69 | 1. Generate overflow by Huge * Huge if X > 0; otherwise, generate
88 BOUNDS1: .long 0x3FB98000,0x400D80C0 | ... 2^(-70),16480
89 BOUNDS2: .long 0x3FB98000,0x400B9B07 | ... 2^(-70),16480 LOG2/LOG10
91 L2TEN64: .long 0x406A934F,0x0979A371 | ... 64LOG10/LOG2
92 L10TWO1: .long 0x3F734413,0x509F8000 | ... LOG2/64LOG10
94 L10TWO2: .long 0xBFCD0000,0xC0219DC1,0xDA994FD2,0x00000000
96 LOG10: .long 0x40000000,0x935D8DDD,0xAAA8AC17,0x00000000
98 LOG2: .long 0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/oprofile/
H A Dop_model_cell.c37 #define PPU_PROFILING 0
44 #define SPU_PROFILE_EVENT_ADDR_MASK_A 0x146 /* sub unit set to zero */
45 #define SPU_PROFILE_EVENT_ADDR_MASK_B 0x186 /* sub unit set to zero */
54 #define CBE_COUNT_ALL_CYCLES 0x42800000 /* PPU cycle event specifier */
62 #define MAX_SPU_COUNT 0xFFFFFF /* maximum 24 bit LFSR value */
68 #define NUM_INTERVAL_CYC 0xFFFFFFFF - 10
107 PASSTHRU_IGNORE = 0,
129 #define GET_SUB_UNIT(x) ((x & 0x0000f000) >> 12)
130 #define GET_BUS_WORD(x) ((x & 0x000000f0) >> 4)
131 #define GET_BUS_TYPE(x) ((x & 0x00000300) >> 8)
[all …]
/OK3568_Linux_fs/kernel/sound/pci/hda/
H A Dpatch_ca0132.c37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
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/OK3568_Linux_fs/kernel/arch/m68k/ifpsp060/src/
H A Dfplsp.S37 short 0x0000
39 short 0x0000
41 short 0x0000
44 short 0x0000
46 short 0x0000
48 short 0x0000
51 short 0x0000
53 short 0x0000
55 short 0x0000
58 short 0x0000
[all …]
H A Dfpsp.S43 set _off_bsun, 0x00
44 set _off_snan, 0x04
45 set _off_operr, 0x08
46 set _off_ovfl, 0x0c
47 set _off_unfl, 0x10
48 set _off_dz, 0x14
49 set _off_inex, 0x18
50 set _off_fline, 0x1c
51 set _off_fpu_dis, 0x20
52 set _off_trap, 0x24
[all …]