Searched refs:hal_demod_swtich_status (Results 1 – 1 of 1) sorted by relevance
315 static MS_U8 hal_demod_swtich_status=0xff; //0xff: switch haven't to be assert 0x00 or 0x01 :late… variable358 if(demod_no==0 && (hal_demod_swtich_status!= 0x00)) in INTERN_DVBC_ActiveDmdSwitch()378 else if(demod_no==1 && (hal_demod_swtich_status!= 0x01)) in INTERN_DVBC_ActiveDmdSwitch()404 hal_demod_swtich_status=demod_no; in INTERN_DVBC_ActiveDmdSwitch()443 if(hal_demod_swtich_status==0) //demod no =0 in INTERN_DVBC_DSPReg_Init()446 …status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx+PARA_TBL_LENGTH*hal_demod_swtich_status, INTERN_DVBC… in INTERN_DVBC_DSPReg_Init()448 else if(hal_demod_swtich_status==1) //demod no =1 in INTERN_DVBC_DSPReg_Init()451 …status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx+PARA_TBL_LENGTH*hal_demod_swtich_status, INTERN_DVBC… in INTERN_DVBC_DSPReg_Init()480 …tus &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(u16DspAddr+PARA_TBL_LENGTH*hal_demod_swtich_status, &u8RegRe… in INTERN_DVBC_DSPReg_Init()484 …us &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(u16DspAddr+PARA_TBL_LENGTH*hal_demod_swtich_status, u8RegWri… in INTERN_DVBC_DSPReg_Init()[all …]