Home
last modified time | relevance | path

Searched refs:ge_fbaddr (Results 1 – 17 of 17) sorted by relevance

/utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/ge/
H A DhalGE.c287 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
294 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
303 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
308 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
315 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
317 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
321 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7821/ge/
H A DhalGE.c298 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
301 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
305 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
314 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
319 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
322 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
324 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
326 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
328 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
332 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/maxim/ge/
H A DhalGE.c285 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
288 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
292 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
301 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
306 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
309 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
313 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
315 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
319 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6/ge/
H A DhalGE.c287 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
294 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
303 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
308 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
315 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
317 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
321 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7621/ge/
H A DhalGE.c285 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
288 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
292 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
301 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
306 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
309 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
313 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
315 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
319 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/curry/ge/
H A DhalGE.c287 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
294 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
303 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
308 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
315 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
317 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
321 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/kano/ge/
H A DhalGE.c287 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
294 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
303 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
308 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
315 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
317 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
321 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6lite/ge/
H A DhalGE.c284 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
287 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
291 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
300 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
305 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
308 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
310 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
312 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
314 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
318 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/maserati/ge/
H A DhalGE.c298 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
301 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
305 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
314 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
319 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
322 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
324 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
326 else if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
328 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
332 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/messi/ge/
H A DhalGE.c282 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
285 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
294 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
299 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
302 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
304 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
308 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/hal/manhattan/ge/
H A DhalGE.c283 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
286 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
295 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
300 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
303 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
305 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
309 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
312 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/hal/mainz/ge/
H A DhalGE.c282 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
285 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
294 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
299 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
302 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
304 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
308 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/hal/macan/ge/
H A DhalGE.c282 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
285 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
294 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
299 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
302 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
304 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
308 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/hal/mooney/ge/
H A DhalGE.c287 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr) in _GFXAPI_MIU_ID() argument
290 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
299 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
304 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
307 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
309 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
316 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/hal/mustang/ge/
H A DhalGE.c309 MS_U8 _GFXAPI_MIU_ID(MS_U32 ge_fbaddr) in _GFXAPI_MIU_ID() argument
312 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
321 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
326 MS_U32 _GFXAPI_PHYS_ADDR_IN_MIU(MS_U32 ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
329 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
331 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
335 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
338 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/hal/maldives/ge/
H A DhalGE.c309 MS_U8 _GFXAPI_MIU_ID(MS_U32 ge_fbaddr) in _GFXAPI_MIU_ID() argument
312 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_MIU_ID()
321 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))); in _GFXAPI_MIU_ID()
326 MS_U32 _GFXAPI_PHYS_ADDR_IN_MIU(MS_U32 ge_fbaddr) in _GFXAPI_PHYS_ADDR_IN_MIU() argument
329 if(ge_fbaddr>=HAL_MIU1_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
331 return (ge_fbaddr -= HAL_MIU1_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
335 return (ge_fbaddr); in _GFXAPI_PHYS_ADDR_IN_MIU()
338 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1)); in _GFXAPI_PHYS_ADDR_IN_MIU()
/utopia/UTPA2-700.0.x/modules/graphic/drv/ge/
H A DdrvGE.h1185 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr);
1186 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr) ;