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Searched refs:VOP_REG_HS_OUTPUT (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DhalMVOP.c2865 if(HAL_ReadRegBit(VOP_REG_HS_OUTPUT, BIT0)) in HAL_MVOP_GetHandShakeMode()
2876 if(HAL_ReadRegBit(SUB_REG(VOP_REG_HS_OUTPUT), BIT0)) in HAL_MVOP_GetHandShakeMode()
3116 HAL_WriteByteMask(VOP_REG_HS_OUTPUT, 0x06, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3122 HAL_WriteByteMask(VOP_REG_HS_OUTPUT, 0x00, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3134 … HAL_WriteByteMask(SUB_REG(VOP_REG_HS_OUTPUT), 0x06, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3138 … HAL_WriteByteMask(SUB_REG(VOP_REG_HS_OUTPUT), 0x00, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3176 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, 1, VOP_HS_MODE); in HAL_MVOP_ResetReg()
3296 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), 1, VOP_HS_MODE); in HAL_MVOP_ResetReg()
3405 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3428 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
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H A DregMVOP.h353 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DhalMVOP.c3133 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3134 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3135 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3154 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3155 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3156 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3555 HAL_WriteByteMask(VOP_REG_HS_OUTPUT, 0x06, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3561 HAL_WriteByteMask(VOP_REG_HS_OUTPUT, 0x00, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3573 … HAL_WriteByteMask(SUB_REG(VOP_REG_HS_OUTPUT), 0x06, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3577 … HAL_WriteByteMask(SUB_REG(VOP_REG_HS_OUTPUT), 0x00, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
H A DregMVOP.h337 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DhalMVOP.c3292 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3294 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3295 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3333 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3335 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3336 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3788 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_EnableHDRSetting()
5523 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SubEnableHDRSetting()
H A DregMVOP.h336 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DhalMVOP.c3307 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3309 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3310 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3329 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3331 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3332 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3812 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_EnableHDRSetting()
5487 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SubEnableHDRSetting()
H A DregMVOP.h338 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DhalMVOP.c3237 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3238 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3239 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3275 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3276 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3277 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3664 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_EnableHDRSetting()
5297 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SubEnableHDRSetting()
H A DregMVOP.h332 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DhalMVOP.c3262 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3264 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3265 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3303 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3305 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3306 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3758 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_EnableHDRSetting()
5445 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SubEnableHDRSetting()
H A DregMVOP.h335 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DhalMVOP.c3368 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3370 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3371 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3390 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3392 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3393 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3873 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_EnableHDRSetting()
5614 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SubEnableHDRSetting()
H A DregMVOP.h338 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DhalMVOP.c3202 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3220 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3393 HAL_WriteByteMask(VOP_REG_HS_OUTPUT, 0x06, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3398 HAL_WriteByteMask(VOP_REG_HS_OUTPUT, 0x00, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3409 … HAL_WriteByteMask(SUB_REG(VOP_REG_HS_OUTPUT), 0x06, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
3413 … HAL_WriteByteMask(SUB_REG(VOP_REG_HS_OUTPUT), 0x00, VOP_TRIG_FROM_XC|VOP_VSUNC_FROM_XC); in HAL_MVOP_SetTimingFromXC()
H A DregMVOP.h332 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DhalMVOP.c3114 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3115 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3116 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3147 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3148 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3149 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
H A DregMVOP.h328 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DhalMVOP.c3164 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3165 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3166 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3219 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3220 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3221 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
H A DregMVOP.h329 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DhalMVOP.c3164 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3165 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3166 HAL_WriteRegBit(VOP_REG_HS_OUTPUT, bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3219 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, VOP_HS_MODE); in HAL_MVOP_SetHandShakeMode()
3220 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT2);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
3221 HAL_WriteRegBit(SUB_REG(VOP_REG_HS_OUTPUT), bEnable, BIT1);//reg_vsync_from_sc in HAL_MVOP_SetHandShakeMode()
H A DregMVOP.h329 #define VOP_REG_HS_OUTPUT (MVOP_REG_BASE + 0x7C) macro